參數(shù)資料
型號(hào): M7A3PE600-FPQ208I
元件分類(lèi): FPGA
英文描述: FPGA, 600000 GATES, PQFP208
封裝: 0.50 MM PITCH, PLASTIC, QFP-208
文件頁(yè)數(shù): 119/168頁(yè)
文件大?。?/td> 1335K
代理商: M7A3PE600-FPQ208I
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)當(dāng)前第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)第145頁(yè)第146頁(yè)第147頁(yè)第148頁(yè)第149頁(yè)第150頁(yè)第151頁(yè)第152頁(yè)第153頁(yè)第154頁(yè)第155頁(yè)第156頁(yè)第157頁(yè)第158頁(yè)第159頁(yè)第160頁(yè)第161頁(yè)第162頁(yè)第163頁(yè)第164頁(yè)第165頁(yè)第166頁(yè)第167頁(yè)第168頁(yè)
ProASIC3E Flash Family FPGAs
2- 42
Advanced v0.5
Simultaneous Switching Outputs and Printed Circuit Board Layout
Simultaneously switching outputs (SSO) can cause signal
integrity problems on adjacent signals that are not part
of the SSO bus. Both inductive and capacitive coupling
parasitics of bond wires inside packages and of traces on
printed circuit boards (PCBs) will transfer noise from SSO
busses
onto
signals
adjacent
to
those
busses.
Additionally, SSOs can produce ground bounce noise and
VCCI dip noise. These two noise types are caused by
rapidly-changing
currents
through
GND
and
VCCI
package pin inductances during switching activities
Ground bounce noise voltage = L (GND) × di/dt
EQ 2-1
VCCI dip noise voltage = L (VCCI) × di/dt
EQ 2-2
Any group of four or more input pins switching on the
same clock edge is considered an SSO bus. The shielding
should be done both on the board and inside the
package unless otherwise described.
In-package shielding can be achieved in several ways; the
required shielding will vary depending on whether pins
next to the SSO bus are LVTTL/LVCMOS inputs, LVTTL/
LVCMOS outputs, or GTL/SSTL/HSTL/LVDS/LVPECL inputs
and outputs. Board traces in the vicinity of the SSO bus
have to be adequately shielded from mutual coupling
and inductive noise that can be generated by the SSO
bus. Also, noise generated by the SSO bus needs to be
reduced inside the package.
PCBs perform an important function in feeding stable
supply voltage to the IC and at the same time maintain
signal integrity between devices.
Key issues that need to considered are as follows:
Power and ground plane design and decoupling
network design
Transmission line reflections and terminations
相關(guān)PDF資料
PDF描述
M7A3PE600-FPQG208I FPGA, 600000 GATES, PQFP208
M7R-R63FAJFREQ CRYSTAL OSCILLATOR, CLOCK, 80.001 MHz - 125 MHz, CMOS/TTL OUTPUT
M7R-R68TAJFREQ CRYSTAL OSCILLATOR, CLOCK, 80.001 MHz - 125 MHz, CMOS/TTL OUTPUT
M7R76FCJFREQ CRYSTAL OSCILLATOR, CLOCK, 80.001 MHz - 125 MHz, CMOS OUTPUT
M7R-R53FCJFREQ CRYSTAL OSCILLATOR, CLOCK, 80.001 MHz - 125 MHz, CMOS OUTPUT
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M7A5 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:MEDIUM CURRENT SILICON RECTIFIERS
M7A9 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:MEDIUM CURRENT SILICON RECTIFIERS
M7AFS600-1FG256 制造商:Microsemi Corporation 功能描述:FPGA FUSION 600K GATES 1282.05MHZ 130NM 1.5V 256FBGA - Trays 制造商:Microsemi SOC Products Group 功能描述:FPGA FUSION 600K GATES 1282.05MHZ 130NM 1.5V 256FBGA - Trays
M7AFS600-1FG256ES 制造商:ACTEL 制造商全稱(chēng):Actel Corporation 功能描述:Actel Fusion Mixed-Signal FPGAs
M7AFS600-1FG256I 制造商:Microsemi Corporation 功能描述:FPGA FUSION 600K GATES 1282.05MHZ 130NM 1.5V 256FBGA - Trays 制造商:Microsemi SOC Products Group 功能描述:FPGA FUSION 600K GATES 1282.05MHZ 130NM 1.5V 256FBGA - Trays