參數(shù)資料
型號(hào)： M7A3PE600-FFG484I
元件分類： FPGA
英文描述： FPGA, 600000 GATES, PBGA484
封裝： 1 MM PITCH, FBGA-484
文件頁數(shù)： 136/168頁
文件大?。?/td> 1335K
代理商： M7A3PE600-FFG484I
ProASIC3E Flash Family FPGAs
A d v an c ed v0 . 5
1-1
Introduction and Overview
General Description
ProASIC3E, the third-generation family of Actel Flash
FPGAs, offers performance, density, and features beyond
those of the ProASICPLUS family. The nonvolatile Flash
technology gives ProASIC3E devices the advantage of
being a secure, low-power, single-chip solution that is
live at power-up. ProASIC3E is reprogrammable and
offers time-to-market benefits at an ASIC-level unit cost.
These features enable designers to create high-density
systems using existing ASIC or FPGA design flows and
tools.
ProASIC3E
devices
offer
1
kbit
of
on-chip,
programmable, nonvolatile FlashROM memory storage
as well as clock conditioning circuitry based on six
integrated phase-locked loops (PLLs). ProASIC3E devices
have up to 3 million system gates, supported with up to
504 kbits of true dual-port SRAM and up to 616 user I/Os.
All ProASIC3E devices support the ARM7 soft IP core, and
the ARM-enabled devices have Actel ordering numbers
that begin with M7A3PE.
Flash Advantages
Reduced Cost of Ownership
Advantages to the designer extend beyond low-unit
cost, performance, and ease of use. Unlike SRAM-based
FPGAs, the Flash-based ProASIC3E devices allow for all
functionality to be live at power-up; no external boot
PROM
is
required.
On-board
security
mechanisms
prevent access to all the programming information and
enable secure remote updates of the FPGA logic.
Designers
can
perform
secure
remote
in-system
reprogramming to support future design iterations and
field upgrades with confidence that valuable intellectual
property (IP) cannot be compromised or copied. Secure
ISP can be performed using the industry-standard AES
algorithm. The ProASIC3E family device architecture
mitigates the need for ASIC migration at higher user
volumes. This makes the ProASIC3E family a cost-
effective ASIC replacement solution, especially for
applications
in
the
consumer,
networking/
communications, computing, and avionics markets.
Security
The nonvolatile, Flash-based ProASIC3E devices require
no boot PROM, so there is no vulnerable external
bitstream that can be easily copied. ProASIC3E devices
incorporate
FlashLock,
which
provides
a
unique
combination of reprogrammability and design security
without external overhead, advantages that only an
FPGA with nonvolatile, Flash programming can offer.
ProASIC3E devices utilize a 128-bit Flash-based lock and a
separate AES key to secure programmed intellectual
property and configuration data. In addition, all
FlashROM data in the ProASIC3E devices can be
encrypted prior to loading, using the industry-leading
AES-128 (FIPS192) bit block cipher encryption standard.
The AES standard was adopted by the National Institute
of Standards and Technology (NIST) in 2000, and replaces
the 1977 DES standard. ProASIC3E devices have a built-in
AES decryption engine and a Flash-based AES key that
make them the most comprehensive programmable logic
device security solution available today. ProASIC3E
devices with AES-based security allow for secure, remote
field updates over public networks such as the Internet,
and ensure that valuable IP remains out of the hands of
system overbuilders, system cloners, and IP thieves. The
contents of a programmed ProASIC3E device cannot be
read back, although secure design verification is possible.
Security, built into the FPGA fabric, is an inherent
component of the ProASIC3E family. The Flash cells are
located beneath seven metal layers, and many device
design and layout techniques have been used to make
invasive attacks extremely difficult. ProASIC3E, with
FlashLock and AES security, is unique in being highly
resistant to both invasive and noninvasive attacks. Your
valuable IP is protected and secure, making remote ISP
possible.
A
ProASIC3E
device
provides
the
most
impenetrable security for programmable logic designs.
Single Chip
Flash-based FPGAs store the configuration information
in
on-chip
Flash
cells.
Once
programmed,
the
configuration data is an inherent part of the FPGA
structure and no external configuration data needs to be
loaded at system power-up (unlike SRAM-based FPGAs).
Therefore, Flash-based ProASIC3E FPGAs do not require
system configuration components such as EEPROMs or
microcontrollers to load the device configuration data.
This reduces bill-of-materials costs and printed circuit
board (PCB) area, and increases security and system
reliability.
相關(guān)PDF資料
PDF描述
M7A3PE600-FFGG256I FPGA, 600000 GATES, PBGA256
M7A3PE600-FFGG484I FPGA, 600000 GATES, PBGA484
M7A3PE600-FPQ208I FPGA, 600000 GATES, PQFP208
M7A3PE600-FPQG208I FPGA, 600000 GATES, PQFP208
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