參數(shù)資料
型號: M37754S4CHP
廠商: Mitsubishi Electric Corporation
英文描述: SINGLE-CHIP 16BIT CMOS MICROCOMPUTER
中文描述: 單芯片16位微機的CMOS
文件頁數(shù): 72/114頁
文件大?。?/td> 1116K
代理商: M37754S4CHP
72
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
MITSUBISHI MICROCOMPUTERS
M37754M8C-XXXGP, M37754M8C-XXXHP
M37754S4CGP, M37754S4CHP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Fig. 85 Processor modes and ports P0 to P4, P10 and P11
Notes 1 : E signal is not output in the memory expansion and microprocessor modes.
2 : The signal output stop disable bit (bit 4 of particular function select register 0) can stop E output in the single-chip mode and
φ
1
processor mode. Similarly, when accessing the internal memory in the memory expansion and microprocessor modes, RD and WR output can be
fixed to “H”. Refer to Table 8 for details.
PM
1
PM
0
Mode
Port
E/RD
Port P0
Port P1
Port P2
Port P3
Port P4
BYTE = “L”
BYTE = “H”
BYTE = “L”
0
0
Single-chip mode
Clock
φ
1
is output from P4
2
when bit 7 of
processor mode register 0 is “1”.
0
1
Memory expansion mode
(Note 1)
Clock
φ
1
is output from P4
2
when bit 7 of
processor mode register 0 is “1.”
1
0
Microprocessor mode
(Note 1)
Same as left
Same as left
Same as left
Same as left
Same as left
Same as left
Same as left
Clock
φ
1
is output from P4
2
regardless of
bit 7 of processor mode register 0 ; others
are the same as left (Note 2)
BYTE = “H”
Condition except following
When multiplex bus select bit is “1” and
accessing CS
4
area
E
P0
0
to
P2
7
I/O port
E
P10
0
to
P10
7
I/O port
E
P11
0
to
P11
7
I/O port
P3
0
to
P3
3
E
I/O port
E
I/O port
E
P0
0
to
P2
7
Address A
0
to A
19
,A
23
P10
0
to
P10
7
E
P10
0
to
P10
7
E
Data
(odd, even)
P10
0
to
P10
7
E
Data
(odd, even)
Address
LA
0
to LA
7
P11
0
to
P11
7
E
Data (odd)
P11
0
to
P11
7
I/O port
P3
0
P3
1
P3
2
WR
BHE
ALE
P3
3
HLDA
(Note 2)
E
P4
0
P4
1
P4
2
to
P4
7
HOLD input
RDY input
I/O port
E
Port
P10
Port
P11
E/RD
RD
(Note 2)
E/RD
E
(Note 1)
Same as left
P4
0
to
P4
7
Data (even)
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