參數(shù)資料
型號: M37754S4CHP
廠商: Mitsubishi Electric Corporation
英文描述: SINGLE-CHIP 16BIT CMOS MICROCOMPUTER
中文描述: 單芯片16位微機(jī)的CMOS
文件頁數(shù): 36/114頁
文件大?。?/td> 1116K
代理商: M37754S4CHP
36
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
MITSUBISHI MICROCOMPUTERS
M37754M8C-XXXGP, M37754M8C-XXXHP
M37754S4CGP, M37754S4CHP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Timer function for motor control
Three-phase motor drive waveform and pulse motor drive waveform
can be output by using plural internal timers A and B. Those modes
are explained bellow.
Three-phase motor drive waveform output
mode (three-phase waveform mode)
Three-phase waveform mode using four timers of the timers A0, A1,
A2 and B4 is selected by setting the waveform output select bits of
the waveform output mode register (address 1A
16
,
Figure 41) to
“100
2
”.
There are two types of the three-phase waveform mode: three-
phase mode 0 and three-phase mode 1. Bit 4 of the waveform out-
put mode register selects either mode. In three-phase waveform
mode, set the corresponding timer mode registers of timers A0, A1,
and A2 to select the one-shot pulse mode with the rising edge of ex-
ternal trigger; set the timer mode register of timer B2 to select the
timer mode.
Figure 43 shows the three-phase waveform mode block diagram.
The three-phase waveform mode outputs six waveforms, positive
waveforms (U, V, W phases) and negative waveforms (U, V, W
phases), from the respective ports with “L” level active.
Timer A2 controls U and U phases; timer A1 does V and V phases
and timer A0 does W and W phases. Timer B2 controls those one-
shot pulses’ period of timers A2, A1 and A0.
In the waveform output, a short circuit prevention time can be set to
prevent “L” level of positive waveforms (U, V, W phases) from over-
lapping with “L” level of their negative waveforms (U, V, W phases).
The short circuit prevention time can be set with three 8-bit dead-
time timers, sharing one reload register. The dead-time timer oper-
ates as a one-shot timer. As its start trigger, both the rising and falling
edges of timers A0 to A2’s one-shot pulses or their falling edge. Bit 6
of the waveform output mode register selects it. When that is “0”,
both the rising and falling edges become the start trigger; when that
is “1”, the falling edge becomes it.
Timer A0 mode register 56
16
Timer A1 mode register 57
16
Timer A2 mode register 58
16
Fix to “10” in three-phase
waveform mode
Fix to “1” in timers A0, A1
in timer A2
0 : No one-shot pulse output
1 : One-shot pulse output
Fix to “011” in three-phase
waveform mode
Clock source select bit
0 0 : Select Pf
2
0 1 : Select Pf
16
1 0 : Select Pf
64
1 1 : Select Pf
512
7
6
5
0
4
1
3
1
2
1
1
0
0
Address
Timer B2 mode register 5D
16
Fix to “00” in three-phase
waveform mode
Not used in three-phase
waveform mode
Clock source select bit
0 0 : Select Pf
2
0 1 : Select Pf
16
1 0 : Select Pf
64
1 1 : Select Pf
512
7
6
5
×
4
3
×
2
×
1
0
0
0
Address
Fig. 42 Timer A0, A1, A2, mode register and timer B2 mode regis-
ter bit configuration
Waveform output mode register
1A
16
Waveform output select bits
100 : Fix to “100” in three-phase
waveform mode
(Valid in three-phase mode 1)
Three-phase output polarity set buffer
0 : “H” output
1 : “L” output
Three-phase mode select bit
0 : Three-phase mode 0
1 : Three-phase mode 1
Not used in three-phase
waveform mode
Dead-time timer trigger select bit
0 : Both edge of one-shot pulse
with timers A2 to A0
1 : Only the falling edge of one-shot
pulse with timers A2 to A0
Waveform output control bit
0 : Waveform output disabled
1 : Waveform output enabled
7
6
5
×
4
3
2
1
1
0
0
0
Address
Note :
Only when bit 5 of the particular function select register 1
(in Fig. 15) is set to “1”, this register’s contents can be changed
from the status during reset (in Fig.76).
Fig. 41 Waveform output mode register bit configuration
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