參數(shù)資料
型號(hào): K4N26323AE
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 128Mbit GDDR2 SDRAM
中文描述: 128Mbit GDDR2 SDRAM的
文件頁數(shù): 15/52頁
文件大小: 826K
代理商: K4N26323AE
- 15 -
Rev. 1.7 (Jan. 2003)
128M GDDR2 SDRAM
K4N26323AE-GC
Posted CAS
Posted CAS operation is supported to make command and data bus efficient for sustainable bandwidths in GDDR2
SDRAM. In this operation, the GDDR2 SDRAM allows a CAS read or write command to be issued tRCDmin or 1 tCK ear-
lier than tRCDmin after the RAS bank activate command. The command is held for the time of the Additive Latency (AL)
before it is issued inside the device. The Read Latency (RL) is controlled by the sum of AL and the CAS latency (CL).
Therefore if a user chooses to issue a R/W command before the tRCDmin, then AL (greater than 0) must be written into
the EMRS.
Examples of posted CAS operation
Example 1
Read followed by a write to the same bank
[AL = 1, t
RCD
= 9, CL = 7, RL = (AL + CL) = 8, WL = (AL + 1) = 2]
0
7
8
Example 2
Read followed by a write to the same bank
[AL = 0, t
RCD
= 9, CL = 7, RL = (AL + CL) = 7, WL = (AL + 1) = 1]
15
16
17
18
19
20
13
CMD
DQS
DQ
21
CK, CK
0
1
8
14
15
16
17
18
19
20
9
CMD
DQS
DQ
21
CK, CK
t
RL
Dout0 Dout1
Dou2
Dout3
Din0
Din1
Din2
Din3
Din0
Din1
Din2
Din3
Read
Active
Read
22
Active
Dout0 Dout1 Dout2 Dout3
14
23
22
t
HZ
tHZ > 1 tCK
t
RCD
RL
Write
t
WL
Write
t
WL
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