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參數(shù)資料
| 型號： | K4N26323AE |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 128Mbit GDDR2 SDRAM |
| 中文描述： | 128Mbit GDDR2 SDRAM的 |
| 文件頁數(shù)： | 11/52頁 |
| 文件大?。?/td> | 826K |
| 代理商： | K4N26323AE |
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- 11 -
Rev. 1.7 (Jan. 2003)
128M GDDR2 SDRAM
K4N26323AE-GC
The mode register stores the data for controlling the various operating modes of GDDR2 SDRAM. It programs CAS
latency, addressing mode, test mode and various vendor specific options to make GDDR2 SDRAM useful for variety of dif-
ferent applications. The default value of the mode register is not defined, therefore the mode register must be written after
EMRS setting for proper operation. The mode register is written by asserting low on CS, RAS, CAS and WE (The GDDR2
SDRAM should be in active mode with CKE already high prior to writing into the mode register). The state of address pins
A
0
~ A
11
and BA
0
, BA
1
in the same cycle as CS, RAS, CAS and WE going low is written in the mode register. Minimum
four clock cycles are requested to complete the write operation in the mode register. The mode register contents can be
changed using the same command and clock cycle requirements during operation as long as all banks are in the idle state.
The mode register is divided into various fields depending on functionality. The burst length uses A
0
~ A
2
, addressing
mode uses A
3
, CAS latency (read latency from column address) uses A
4
~ A
6
. A
7
is used for test mode. A
9
~ A
11
are
used for tWR. Refer to the table for specific codes for various addressing modes and CAS latencies.
MODE REGISTER SET(MRS)
Address Bus
Mode Register
CAS Latency
A
6
0
0
0
0
1
1
1
1
A
5
0
0
1
1
0
0
1
1
A
4
0
1
0
1
0
1
0
1
Latency
Reserved
Reserved
Reserved
Reserved
Reserved
5
6
7
tWR
A
11
0
0
0
0
1
1
1
1
A
10
0
0
1
1
0
0
1
1
A
9
MRS Select
Reserved
Reserved
3
4
5
Reserved
Reserved
Reserved
0
1
0
1
0
1
0
1
*1. BL 4, Sequential Only
BA
1
BA
0
A
11
A
10
A
9
A
8
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
0
0
*
tWR
0
TM
CAS Latency
BT
Burst Length
Test Mode
A
7
0
1
mode
Normal
Test
Burst Length
A
2
0
A
1
1
A
0
0
Burst Length
4
Burst Type
A
3
0
Burst Type
Sequential
BA
0
0
1
A
n
~ A
0
MRS
EMRS
*1
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| K4N26323AE-GC20 | 128Mbit GDDR2 SDRAM |
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| K4N26323AE-GC25 | 128Mbit GDDR2 SDRAM |
| K4N56163QF | 256Mbit gDDR2 SDRAM |
| K4N56163QF-GC | 256Mbit gDDR2 SDRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| K4N26323AE-GC20 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:128Mbit GDDR2 SDRAM |
| K4N26323AE-GC22 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:128Mbit GDDR2 SDRAM |
| K4N26323AE-GC25 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:128Mbit GDDR2 SDRAM |
| K4N27 | 制造商:KODENSHI 制造商全稱:KODENSHI KOREA CORP. 功能描述:Photocoupler(These Photocouplers consist of a Gallium Arsenide Infrared Emitting) |
| K4N28 | 制造商:KODENSHI 制造商全稱:KODENSHI KOREA CORP. 功能描述:Photocoupler(These Photocouplers consist of a Gallium Arsenide Infrared Emitting) |
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