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參數(shù)資料
| 型號： | IDT71T75902S75BGI8 |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | SRAM |
| 英文描述： | 1M X 18 ZBT SRAM, 7.5 ns, PBGA119 |
| 封裝： | 14 X 22 MM, PLASTIC, BGA-119 |
| 文件頁數(shù)： | 15/26頁 |
| 文件大小： | 644K |
| 代理商： | IDT71T75902S75BGI8 |
6.42
22
IDT71T75702, IDT71T75902, 512K x 36, 1M x 18, 2.5V Synchronous ZBT SRAMs with
2.5V I/O, Burst Counter and Flow-Through Outputs
Commercial and Industrial Temperature Ranges
NOTES:
1. Device outputs = All device outputs except TDO.
2. Device inputs = All device inputs except TDI, TMS, and
TRST.
Instruction Field
Value
Description
Revision Number (31:28)
0x2
Reserved for version number.
IDT Device ID (27:12)
0x221, 0x223
Define s IDT part number 71T75702 and 71T75902, respectively.
IDT JEDEC ID (11:1)
0x33
Allows unique identification of device vendor as IDT.
ID Register Indicator Bit (Bit 0)
1
Indicates the presence of an ID register.
I5319 tbl 02
JTAG Identification Register Definitions
Instruction
Description
OPCODE
EXTEST
Forces contents of the boundary scan cells onto the device outputs
(1).
Places the boundary scan register (BSR) between TDI and TDO.
0000
SAMPLE/PRELOAD
Places the boundary scan register (BSR) between TDI and TDO.
SAMPLE allows data from device inputs
(2) and outputs(1) to be captured
in the boundary scan cells and shifted serially through TDO. PRELOAD
allows data to be input serially into the boundary scan cells via the TDI.
0001
DEVICE_ID
Loads the JTAG ID register (JIDR) with the vendor ID code and places
the register between TDI and TDO.
0010
HIGHZ
Places the bypass register (BYR) between TDI and TDO. Forces all
device o utput drivers to a High-Z state.
0011
RESERVED
Several combinations are reserved. Do not use codes other than those
identified for EXTEST, SAMPLE/PRELOAD, DEVICE_ID, HIGHZ, CLAMP,
VALIDATE and BYPASS instructions.
0100
RESERVED
0101
RESERVED
0110
RESERVED
0111
CLAMP
Uses BYR. Forces contents of the boundary scan cells onto the device
outputs. Places the byp ass registe r (BYR) between TDI and TDO.
1000
RESERVED
Same as above.
1001
RESERVED
1010
RESERVED
1011
RESERVED
1100
VALIDATE
Automatically loaded into the instruction register whenever the TAP
controller passes through the CAPTURE-IR state. The lower two bits '01'
are mand ated by the IEEE std. 1149.1 specification.
1101
RESERVED
Same as above.
1110
BYPASS
The BYPASS instruction is used to truncate the boundary scan register
as a single bit in length.
1111
I5319tbl 04
Available JTAG Instructions
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| IDT71T75902S75PF | 功能描述:IC SRAM 18MBIT 75NS 100TQFP RoHS:否 類別:集成電路 (IC) >> 存儲器 系列:- 產(chǎn)品變化通告:Product Discontinuation 05/Nov/2008 標準包裝:84 系列:- 格式 - 存儲器:RAM 存儲器類型:SRAM - 同步 ZBT 存儲容量:4.5M（128K x 36） 速度:75ns 接口:并聯(lián) 電源電壓:3.135 V ~ 3.465 V 工作溫度:-40°C ~ 85°C 封裝/外殼:119-BGA 供應(yīng)商設(shè)備封裝:119-PBGA（14x22） 包裝:托盤 其它名稱:71V3557SA75BGI |
| IDT71T75902S75PF8 | 功能描述:IC SRAM 18MBIT 75NS 100TQFP RoHS:否 類別:集成電路 (IC) >> 存儲器 系列:- 產(chǎn)品變化通告:Product Discontinuation 05/Nov/2008 標準包裝:84 系列:- 格式 - 存儲器:RAM 存儲器類型:SRAM - 同步 ZBT 存儲容量:4.5M（128K x 36） 速度:75ns 接口:并聯(lián) 電源電壓:3.135 V ~ 3.465 V 工作溫度:-40°C ~ 85°C 封裝/外殼:119-BGA 供應(yīng)商設(shè)備封裝:119-PBGA（14x22） 包裝:托盤 其它名稱:71V3557SA75BGI |
| IDT71T75902S75PFG | 功能描述:IC SRAM 18MBIT 75NS 100TQFP RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:- 標準包裝:45 系列:- 格式 - 存儲器:RAM 存儲器類型:SRAM - 雙端口，異步 存儲容量:128K（8K x 16） 速度:15ns 接口:并聯(lián) 電源電壓:3 V ~ 3.6 V 工作溫度:0°C ~ 70°C 封裝/外殼:100-LQFP 供應(yīng)商設(shè)備封裝:100-TQFP（14x14） 包裝:托盤 其它名稱:70V25S15PF |
| IDT71T75902S75PFG8 | 功能描述:IC SRAM 18MBIT 75NS 100TQFP RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:- 標準包裝:45 系列:- 格式 - 存儲器:RAM 存儲器類型:SRAM - 雙端口，異步 存儲容量:128K（8K x 16） 速度:15ns 接口:并聯(lián) 電源電壓:3 V ~ 3.6 V 工作溫度:0°C ~ 70°C 封裝/外殼:100-LQFP 供應(yīng)商設(shè)備封裝:100-TQFP（14x14） 包裝:托盤 其它名稱:70V25S15PF |
| IDT71T75902S75PFGI | 制造商:Integrated Device Technology Inc 功能描述:IC SRAM 18MBIT 7.5NS 100TQFP |
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