參數(shù)資料
型號: HY27US08121B-FIB
廠商: HYNIX SEMICONDUCTOR INC
元件分類: PROM
英文描述: 64M X 8 FLASH 3.3V PROM, 18 ns, PBGA63
封裝: 9 X 11 MM, 1 MM HEIGHT, 0.80 MM PITCH, FBGA-63
文件頁數(shù): 34/40頁
文件大?。?/td> 360K
代理商: HY27US08121B-FIB
Rev 0.5 / Jul. 2007
4
HY27US(08/16)12(1/2)B Series
512Mbit (64Mx8bit / 32Mx16bit) NAND Flash
1. SUMMARY DESCRIPTION
The Hynix HY27US(08/16)12(1/2)B series is a 64Mx8bit with spare 2Mx8 bit capacity. The device is offered in 3.3V Vcc
Power Supply.
Their NAND cell provides the most cost-effective solution for the solid state mass storage market.
The memory is divided into blocks that can be erased independently so it is possible to preserve valid data while old data is
erased.
The memory contains 4096 blocks, composed by 32 pages consisting in two NAND structures of 16 series connected Flash
cells.
A program operation allows to write the 512-byte (x8 device) or 256-word (x16 device) page in typical 200us and an erase
operation can be performed in typical 2ms on a 16K-byte (X8 device) block.
Data in the page can be read out at 30ns cycle time (3.3V device) per byte. The I/O pins serve as the ports for address and
data input/output as well as command input. This interface allows a reduced pin count and easy migration towards differ-
ent densities, without any rearrangement of footprint.
Commands, Data and Addresses are synchronously introduced using CE, WE, ALE and CLE input pin.
The on-chip Program/Erase Controller automates all program and erase functions including pulse repetition, where
required, and internal verification and margining of data.
The modify operations can be locked using the WP input pin .
The output pin R/B (open drain buffer) signals the status of the device during each operation. In a system with multiple
memories the R/B pins can be connected all together to provide a global status signal.
Even the write-intensive systems can take advantage of the HY27US(08/16)12(1/2)B extended reliability of 100K pro-
gram/erase cycles by providing ECC (Error Correcting Code) with real time mapping-out algorithm.
The chip is offered with the CE don’t care function. This option allows the direct download of the code from the NAND Flash
memory device by a microcontroller, since the CE transitions do not stop the read operation.
The copy back function allows the optimization of defective blocks management: when a page program operation fails the
data can be directly programmed in another page inside the same array section without the time consuming serial data
insertion phase.
This device includes also extra features like OTP/Unique ID area, Read ID2 extension.
The HY27US(08/16)12(1/2)B is available in 48 - TSOP1 12 x 20 mm package, 48 - USOP1 12 x 17 mm, FBGA 9 x 11 mm.
1.1 Product List
PART NUMBER
ORIZATION
VCC RANGE
PACKAGE
HY27US0812(1/2)B
x8
2.7V - 3.6 Volt
48TSOP1/ 48USOP1/ 63FBGA
HY27US1612(1/2)B
x16
48TSOP1
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