- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄223992 > HY27UA081G1M-TIB (HYNIX SEMICONDUCTOR INC) 128M X 8 FLASH 3.3V PROM, 12000 ns, PDSO48 PDF資料下載
參數(shù)資料
| 型號： | HY27UA081G1M-TIB |
| 廠商： | HYNIX SEMICONDUCTOR INC |
| 元件分類： | PROM |
| 英文描述： | 128M X 8 FLASH 3.3V PROM, 12000 ns, PDSO48 |
| 封裝： | 12 X 20 MM, 1.20 MM HEIGHT, TSOP1-48 |
| 文件頁數(shù)： | 22/43頁 |
| 文件大?。?/td> | 729K |
| 代理商： | HY27UA081G1M-TIB |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁當前第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁
Rev 0.5 / Oct. 2004
29
HY27UA(08/16)1G1M Series
HY27SA(08/16)1G1M Series
1Gbit (128Mx8bit / 64Mx16bit) NAND Flash
Table 15: AC Characteristics for Operation (3.3V Device and 1.8V Device)
Alt.
Symbol
Parameter
3.3V
Device
1.8V
Device
Unit
tALLRL1
tAR1
Address Latch Low to
Read Enable Low
Read Electronic Signature
Min
10
25
ns
tALLRL2
tAR2
Read cycle
Min
50
80
ns
tBHRL
tRR
Ready/Busy High to Read Enable Low
Min
20
ns
tBLBH1
tR
Ready/Busy Low to
Ready/Busy High
1Gb : Dual Die
Max
12
15
us
tBLBH2
tPROG
Program Busy time
Max
500
us
tBLBH3
tBERS
Erase Busy time
Max
3
ms
tBLBH4
tRST
Reset Busy time, during ready
Max
5
us
Reset Busy time, during read
Max
5
us
Reset Busy time, during program
Max
10
us
Reset Busy time, during erase
Max
500
us
tCLLRL
tCLR
Command Latch Low to Read Enable Low
Min
10
ns
tDZRL
tIR
Data Hi-Z to Read Enable Low
Min
0
ns
tEHBH
tCRY
Chip Enable High to Ready/Busy High (CE intercepted read)
Max
70+tr(1)
ns
tEHEL
tCEH
Chip Enable High to Chip Enable Low(2)
Min
100
ns
tEHQZ
tCHZ
Chip Enable High to Output Hi-Z
Max
20
ns
tELQV
tCEA
Chip Enable Low to Output Valid
Max
45
75
ns
tRHBL
tRB
Read Enable High to
Ready/Busy Low
Max
100
ns
tRHRL
tREH
Read Enable High to
Read Enable Low
Read Enable High Hold time
Min
15
20
ns
tRHQZ
tRHZ
Read Enable High to
Output Hi-Z
Min
15
ns
Max
30
tRLRH
tRP
Read Enable Low to
Read Enable High
Read Enable Pulse Width
Min
40
60
ns
tRLRL
tRC
Read Enable Low to
Read Enable Low
Read Cycle time
Min
60
80
ns
tRLQV
tREA
Read Enable Low to
Output Valid
Read Enable Access time
Max
35
60
ns
tREADID
Read ES(3) Access time
45
60
tWHBH
tR
Write Enable High to Ready/Busy High
Max
12
15
us
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HY27US08121B-TPIS | 64M X 8 FLASH 3.3V PROM, 18 ns, PDSO48 |
| HY27US08121B-FIB | 64M X 8 FLASH 3.3V PROM, 18 ns, PBGA63 |
| HY27US081G1MSES | 128M X 8 FLASH 2.7V PROM, 45 ns, PDSO48 |
| HY27US081G1MTCS | 128M X 8 FLASH 2.7V PROM, 45 ns, PDSO48 |
| HY27US081G1MTPMP | 128M X 8 FLASH 2.7V PROM, 45 ns, PDSO48 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HY27UA161G1M | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:1Gbit (128Mx8bit / 64Mx16bit) NAND Flash Memory |
| HY27UA1G1M | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:1Gbit (128Mx8bit / 64Mx16bit) NAND Flash Memory |
| HY27UAXXX | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:1Gbit (128Mx8bit / 64Mx16bit) NAND Flash Memory |
| HY27UF081G2A | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:1Gbit (128Mx8bit / 64Mx16bit) NAND Flash |
| HY27UF081G2A-C | 制造商:SK Hynix Inc 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。