參數(shù)資料
型號(hào)： HIP8112A
廠商： Harris Corporation
英文描述： NTSC/PAL Video Decoder
中文描述： NTSC / PAL視頻解碼器
文件頁數(shù)： 17/40頁
文件大?。?/td> 719K
代理商： HIP8112A
4-17
TABLE 11. COLOR SATURATION ADJUST FACTOR
SUB ADDRESS = 0x05
BIT
NUMBER
FUNCTION
DESCRIPTION
RESET
STATE
7 - 0
Color Saturation
Adjust Factor
This register sets the color saturation adjust factor. This value is multiplied by the chromi-
nance (CbCr) data and allows the data to be scaled from 0 to a factor of +1.996. This 8-bit
number is a fractional number as shown below:
2
0
2
-1
2
-2
2
-3
2
-4
2
-5
2
-6
2
-7
The default saturation factor of 1.2266 is calculated as follows:
Register Data = Factor * 128 = 1.2266 * 128 = 157 = 0x9D
1001 1101
B
(0x9D)
TABLE 12. PLL CLOCK FREQUENCY RATIO (LSB)
SUB ADDRESS = 0x06
BIT
NUMBER
FUNCTION
DESCRIPTION
RESET
STATE
7 - 0
PLL Clock
Frequency Ratio
(LSB)
These bits are used to program the ratio of the incoming video chrominance color sub-
carrier frequency to the input clock (CLK) used. This number serves as the reference fre-
quency of the chrominance PLL. This is the lower byte (LSB) of the ratio and
encompasses the following range:
2
-9
2
-10
2
-11
2
-12
2
-13
2
-14
2
-15
2
-16
The default value is for a CLK frequency of 27MHz and a color subcarrier of 3.579545
MHz. The register data is calculated as follows:
Ratio =(4 x fSC) / CLK
=(4 x 3.579545MHz) / 27MHz
=0.530303
Register Data: Ratio * 65536
0.530303 * 65536
34753.94
Convert to Hex:0x87C1
Reg 0x06 LSB =0xC1
Reg 0x07 MSB =0x87
Refer to Table 1 for common PLL Ratio values with CLKs of 27MHz or 24.54Hz
1100 0001
B
(0xC1)
TABLE 13. PLL CLOCK FREQUENCY RATIO (MSB)
SUB ADDRESS = 0x07
BIT
NUMBER
FUNCTION
DESCRIPTION
RESET
STATE
15 - 8
PLL Clock
Frequency Ratio
(MSB)
This is the upper data byte (MSB) of the PLL Clock Freq as described in Reg 0x06 above
and encompasses the following range:
2
-1
2
-2
2
-3
2
-4
2
-5
2
-6
2
-7
2
-8
1000 0111
B
(0x87)
HMP8112A
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