參數(shù)資料
型號(hào): HB52E169E12
廠商: Hitachi,Ltd.
英文描述: 128 MB Registered SDRAM DIMM(128 MB 寄存同步DRAM DIMM)
中文描述: 128 MB的注冊(cè)SDRAM的內(nèi)存(128 MB的寄存同步的DRAM內(nèi)存)
文件頁(yè)數(shù): 12/53頁(yè)
文件大小: 1737K
代理商: HB52E169E12
HB52E169E12-F
12
Notes: 1. I
CC
depends on output load condition when the device is selected. I
CC
(max) is specified at the
output open condition.
2. One bank operation.
3. Input signals are changed once per one clock.
4. Input signals are changed once per two clocks.
5. Input signals are changed once per four clocks.
6. After power down mode, CK operating current.
7. After power down mode, no CK operating current.
8. After self refresh mode set, self refresh current.
Capacitance (Ta = 25
°
C, V
CC
= 3.3 V
±
0.3 V)
Notes: 1. Capacitance measured with Boonton Meter or effective capacitance measuring method.
2. Measurement condition: f = 1 MHz, 1.4 V bias, 200 mV swing.
3. DQMB = V
IH
to disable Data-out.
4. This parameter is sampled and not 100% tested.
Burst operating current
(CE latency = 3)
(CE latency = 4)
Refresh current
Self refresh current
I
CC4
I
CC4
I
CC5
I
CC6
1770
1770
2580
528
mA
mA
mA
mA
t
CK
= min, BL = 4
1, 2, 5
t
RC
= min
V
IH
V
CC
– 0.2 V
V
IL
0.2 V
0
Vin
V
CC
0
Vout
V
CC
DQ = disable
I
OH
= –4 mA
I
OL
= 4 mA
3
8
Input leakage current
Output leakage current
I
LI
I
LO
–10
–10
10
10
μ
A
μ
A
Output high voltage
Output low voltage
V
OH
V
OL
2.4
0.4
V
V
Parameter
Input capacitance (Address)
Input capacitance (RE, CE, W)
Input capacitance (CKE)
Input capacitance (S)
Input capacitance (CK)
Input capacitance (DQMB)
Input/Output capacitance (DQ)
Symbol
C
I1
C
I2
C
I3
C
I4
C
I5
C
I6
C
I/O1
Max
15
15
23
15
40
15
15
Unit
pF
pF
pF
pF
pF
pF
pF
Notes
1, 2, 4
1, 2, 4
1, 2, 4
1, 2, 4
1, 2, 4
1, 2, 4
1, 2, 3, 4
Parameter
Symbol
HB52E169E12
-A6F/B6F
Min
Unit
Test conditions
Notes
Max
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