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| 型號： | DV164136 |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 94/107頁 |
| 文件大小： | 0K |
| 描述： | DEVELOPMENT KIT FOR PIC18 |
| 產(chǎn)品培訓(xùn)模塊： | PIC18 J Series MCU Overview |
| 標準包裝： | 1 |
| 系列： | PIC® |
| 類型： | MCU |
| 適用于相關(guān)產(chǎn)品： | PIC18F8722，PIC18F87J11 |
| 所含物品： | 板，線纜，CD，PICkit? 3 個編程器，電源 |
| 產(chǎn)品目錄頁面： | 659 (CN2011-ZH PDF) |
| 相關(guān)產(chǎn)品： | PIC18F87J11-I/PT-ND - IC PIC MCU FLASH 64KX16 80TQFP PIC18F87J11T-I/PTTR-ND - IC PIC MCU FLASH 64KX16 80TQFP PIC18F8722T-E/PT-ND - IC PIC MCU FLASH 64KX16 80TQFP PIC18F8722-E/PT-ND - IC PIC MCU FLASH 64KX16 80TQFP PIC18F8722T-I/PT-ND - IC PIC MCU FLASH 64KX16 80TQFP PIC18F8722-I/PT-ND - IC PIC MCU FLASH 64KX16 80TQFP |
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2007-2012 Microchip Technology Inc.
DS39778E-page 87
PIC18F87J11 FAMILY
6.3.5
STATUS REGISTER
The STATUS register, shown in Register 6-4, contains
the arithmetic status of the ALU. The STATUS register
can be the operand for any instruction, as with any
other register. If the STATUS register is the destination
for an instruction that affects the Z, DC, C, OV or N bits,
then the write to these five bits is disabled.
These bits are set or cleared according to the device
logic. Therefore, the result of an instruction with the
STATUS register as destination may be different than
intended. For example, CLRF STATUS will set the Z bit
but leave the other bits unchanged. The STATUS
register then reads back as ‘000u u1uu’. It is
recommended, therefore, that only BCF, BSF, SWAPF,
MOVFF
and MOVWF instructions are used to alter the
STATUS register because these instructions do not
affect the Z, C, DC, OV or N bits in the STATUS
register.
For other instructions not affecting any Status bits, see
the instruction set summaries in Table 26-2 and
Note:
The C and DC bits operate as a borrow and
digit borrow bit respectively, in subtraction.
REGISTER 6-4:
STATUS REGISTER
U-0
R/W-x
—
—N
OV
Z
DC(1)
C(2)
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-5
Unimplemented:
Read as ‘0’
bit 4
N:
Negative bit
This bit is used for signed arithmetic (2’s complement). It indicates whether the result was
negative (ALU MSB = 1).
1
= Result was negative
0
= Result was positive
bit 3
OV:
Overflow bit
This bit is used for signed arithmetic (2’s complement). It indicates an overflow of the
7-bit magnitude which causes the sign bit (bit 7) to change state.
1
= Overflow occurred for signed arithmetic (in this arithmetic operation)
0
= No overflow occurred
bit 2
Z:
Zero bit
1
= The result of an arithmetic or logic operation is zero
0
= The result of an arithmetic or logic operation is not zero
bit 1
DC:
Digit carry/borrow bit(1)
For ADDWF, ADDLW, SUBLW and SUBWF instructions:
1
= A carry-out from the 4th low-order bit of the result occurred
0
= No carry-out from the 4th low-order bit of the result
bit 0
C:
Carry/borrow bit(2)
For ADDWF, ADDLW, SUBLW and SUBWF instructions:
1
= A carry-out from the Most Significant bit of the result occurred
0
= No carry-out from the Most Significant bit of the result occurred
Note 1:
For borrow, the polarity is reversed. A subtraction is executed by adding the 2’s complement of the second
operand.
2:
For borrow, the polarity is reversed. A subtraction is executed by adding the 2’s complement of the second
operand.
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