參數(shù)資料
型號: DV164136
廠商: Microchip Technology
文件頁數(shù): 30/107頁
文件大小: 0K
描述: DEVELOPMENT KIT FOR PIC18
產(chǎn)品培訓(xùn)模塊: PIC18 J Series MCU Overview
標(biāo)準(zhǔn)包裝: 1
系列: PIC®
類型: MCU
適用于相關(guān)產(chǎn)品: PIC18F8722,PIC18F87J11
所含物品: 板,線纜,CD,PICkit? 3 個編程器,電源
產(chǎn)品目錄頁面: 659 (CN2011-ZH PDF)
相關(guān)產(chǎn)品: PIC18F87J11-I/PT-ND - IC PIC MCU FLASH 64KX16 80TQFP
PIC18F87J11T-I/PTTR-ND - IC PIC MCU FLASH 64KX16 80TQFP
PIC18F8722T-E/PT-ND - IC PIC MCU FLASH 64KX16 80TQFP
PIC18F8722-E/PT-ND - IC PIC MCU FLASH 64KX16 80TQFP
PIC18F8722T-I/PT-ND - IC PIC MCU FLASH 64KX16 80TQFP
PIC18F8722-I/PT-ND - IC PIC MCU FLASH 64KX16 80TQFP
2007-2012 Microchip Technology Inc.
DS39778E-page 29
PIC18F87J11 FAMILY
PORTJ is a bidirectional I/O port.
RJ0/ALE
RJ0
ALE
62
I/O
O
ST
Digital I/O.
External memory address latch enable.
RJ1/OE
RJ1
OE
61
I/O
O
ST
Digital I/O.
External memory output enable.
RJ2/WRL
RJ2
WRL
60
I/O
O
ST
Digital I/O.
External memory write low control.
RJ3/WRH
RJ3
WRH
59
I/O
O
ST
Digital I/O.
External memory write high control.
RJ4/BA0
RJ4
BA0
39
I/O
O
ST
Digital I/O.
External Memory Byte Address 0 control.
RJ5/CE
RJ5
CE
40
I/O
O
ST
Digital I/O
External memory chip enable control.
RJ6/LB
RJ6
LB
41
I/O
O
ST
Digital I/O.
External memory low byte control.
RJ7/UB
RJ7
UB
42
I/O
O
ST
Digital I/O.
External memory high byte control.
VSS
11, 31, 51,
70
P
Ground reference for logic and I/O pins.
VDD
32, 48, 71
P
Positive supply for peripheral digital logic and I/O pins.
AVss
26
P
Ground reference for analog modules.
AVDD
25
P
Positive supply for analog modules.
ENVREG
24
I
ST
Enable for on-chip voltage regulator.
VDDCORE/VCAP
VDDCORE
VCAP
12
P
Core logic power or external filter capacitor connection.
Positive supply for microcontroller core logic
(regulator disabled).
External filter capacitor connection (regulator enabled).
TABLE 1-4:
PIC18F8XJ1X PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number
Pin
Type
Buffer
Type
Description
80-TQFP
Legend:
TTL = TTL compatible input
CMOS = CMOS compatible input or output
ST = Schmitt Trigger input with CMOS levels
Analog = Analog input
I
= Input
O
= Output
P
= Power
OD
= Open-Drain (no P diode to VDD)
I2C = ST with I2C or SMB levels
Note 1:
Alternate assignment for ECCP2/P2A when Configuration bit, CCP2MX, is cleared (Extended Microcontroller mode).
2:
Default assignment for ECCP2/P2A for all devices in all operating modes (CCP2MX is set).
3:
Default assignments for P1B/P1C/P3B/P3C (ECCPMX Configuration bit is set).
4:
Alternate assignment for ECCP2/P2A when CCP2MX is cleared (Microcontroller mode).
5:
Alternate assignments for P1B/P1C/P3B/P3C (ECCPMX Configuration bit is cleared).
6:
Default assignment for PMP data and control pins when PMPMX Configuration bit is set.
7:
Alternate assignment for PMP data and control pins when PMPMX Configuration bit is cleared (programmed).
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