參數(shù)資料
型號(hào)： DV164136
廠商： Microchip Technology
文件頁(yè)數(shù)： 65/107頁(yè)
文件大?。?/td> 0K
描述： DEVELOPMENT KIT FOR PIC18
產(chǎn)品培訓(xùn)模塊： PIC18 J Series MCU Overview
標(biāo)準(zhǔn)包裝： 1
系列： PIC®
類(lèi)型： MCU
適用于相關(guān)產(chǎn)品： PIC18F8722，PIC18F87J11
所含物品： 板，線纜，CD，PICkit? 3 個(gè)編程器，電源
產(chǎn)品目錄頁(yè)面： 659 (CN2011-ZH PDF)
相關(guān)產(chǎn)品： PIC18F87J11-I/PT-ND - IC PIC MCU FLASH 64KX16 80TQFP
PIC18F87J11T-I/PTTR-ND - IC PIC MCU FLASH 64KX16 80TQFP
PIC18F8722T-E/PT-ND - IC PIC MCU FLASH 64KX16 80TQFP
PIC18F8722-E/PT-ND - IC PIC MCU FLASH 64KX16 80TQFP
PIC18F8722T-I/PT-ND - IC PIC MCU FLASH 64KX16 80TQFP
PIC18F8722-I/PT-ND - IC PIC MCU FLASH 64KX16 80TQFP
PIC18F87J11 FAMILY
DS39778E-page 60
2007-2012 Microchip Technology Inc.
5.7
Reset State of Registers
Most registers are unaffected by a Reset. Their status
is unknown on POR and unchanged by all other
Resets. The other registers are forced to a “Reset
state” depending on the type of Reset that occurred.
Most registers are not affected by a WDT wake-up,
since this is viewed as the resumption of normal
operation. Status bits from the RCON register (CM, RI,
TO, PD, POR and BOR) are set or cleared differently in
different Reset situations, as indicated in Table 5-2.
These bits are used in software to determine the nature
of the Reset.
Table 5-3 describes the Reset states for all of the
Special Function Registers (SFRs). These are
categorized by Power-on and Brown-out Resets,
Master Clear and WDT Resets, and WDT wake-ups.
TABLE 5-2:
STATUS BITS, THEIR SIGNIFICANCE AND THE INITIALIZATION CONDITION FOR
RCON REGISTER
Condition
Program
Counter(1)
RCON Register
STKPTR Register
CM
RI
TO
PD
POR
BOR
STKFUL
STKUNF
Power-on Reset
0000h
11
0
RESET
instruction
0000h
u0
uu
u
Brown-out Reset
0000h
11
u
0
u
Configuration Mismatch Reset
0000h
0u
uu
u
MCLR Reset during
power-managed Run modes
0000h
uu
1u
u
MCLR Reset during
power-managed Idle modes
and Sleep mode
0000h
uu
10
u
MCLR Reset during full-power
execution
0000h
uu
u
Stack Full Reset (STVREN = 1)
0000h
uu
u
1
u
Stack Underflow Reset
(STVREN = 1)
0000h
uu
u
1
Stack Underflow Error (not an
actual Reset, STVREN = 0)
0000h
uu
u
1
WDT time-out during full-power
or power-managed Run modes
0000h
uu
0u
u
WDT time-out during
power-managed Idle or Sleep
modes
PC + 2
uu
00
u
Interrupt exit from
power-managed modes
PC + 2
uu
u0
u
Legend: u
= unchanged
Note 1:
When the wake-up is due to an interrupt and the GIEH or GIEL bit is set, the PC is loaded with the interrupt
vector (0008h or 0018h).
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