參數(shù)資料
型號： DV164136
廠商： Microchip Technology
文件頁數(shù)： 72/107頁
文件大小： 0K
描述： DEVELOPMENT KIT FOR PIC18
產(chǎn)品培訓(xùn)模塊： PIC18 J Series MCU Overview
標(biāo)準(zhǔn)包裝： 1
系列： PIC®
類型： MCU
適用于相關(guān)產(chǎn)品： PIC18F8722，PIC18F87J11
所含物品： 板，線纜，CD，PICkit? 3 個編程器，電源
產(chǎn)品目錄頁面： 659 (CN2011-ZH PDF)
相關(guān)產(chǎn)品： PIC18F87J11-I/PT-ND - IC PIC MCU FLASH 64KX16 80TQFP
PIC18F87J11T-I/PTTR-ND - IC PIC MCU FLASH 64KX16 80TQFP
PIC18F8722T-E/PT-ND - IC PIC MCU FLASH 64KX16 80TQFP
PIC18F8722-E/PT-ND - IC PIC MCU FLASH 64KX16 80TQFP
PIC18F8722T-I/PT-ND - IC PIC MCU FLASH 64KX16 80TQFP
PIC18F8722-I/PT-ND - IC PIC MCU FLASH 64KX16 80TQFP
2007-2012 Microchip Technology Inc.
DS39778E-page 67
PIC18F87J11 FAMILY
6.0
MEMORY ORGANIZATION
There are two types of memory in PIC18 Flash
microcontroller devices:
Program Memory
Data RAM
As Harvard architecture devices, the data and program
memories use separate busses; this allows for
concurrent access of the two memory spaces.
Additional detailed information on the operation of the
Flash program memory is provided in Section 7.0
6.1
Program Memory Organization
PIC18 microcontrollers implement a 21-bit Program
Counter (PC) which is capable of addressing a 2-Mbyte
program memory space. Accessing a location between
the upper boundary of the physically implemented
memory and the 2-Mbyte address will return all ‘0’s (a
NOP
instruction).
The entire PIC18F87J11 family of devices offers three
different on-chip Flash program memory sizes, from
64 Kbytes (up to 16,384 single-word instructions) to
128 Kbytes (65,536 single-word instructions). The
program memory maps for individual family members
are shown in Figure 6-3.
FIGURE 6-1:
MEMORY MAPS FOR PIC18F87J11 FAMILY DEVICES
Note:
Sizes of memory areas are not to scale. Sizes of program memory areas are enhanced to show detail.
Unimplemented
Read as ‘0’
Unimplemented
Read as ‘0’
000000h
1FFFFFF
PIC18FX6J11
PIC18FX6J16
PIC18FX7J11
00FFFFh
017FFFh
PC<20:0>
Stack Level 1
Stack Level 31
CALL, CALLW, RCALL,
RETURN, RETFIE, RETLW,
21
Us
er
M
e
mo
ry
S
pace
On-Chip
Memory
On-Chip
Memory
On-Chip
Memory
ADDULNK, SUBULNK
Config. Words
01FFFFh
Unimplemented
Read as ‘0’
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