參數(shù)資料
型號(hào)： B900M24FXX12IT
元件分類： 數(shù)字信號(hào)處理
英文描述： 0-BIT, 59.88 MHz, OTHER DSP, PQCC44
文件頁數(shù)： 43/100頁
文件大?。?/td> 1547K
代理商： B900M24FXX12IT
Advance Data Sheet
B900
July 1999
Baseband Signal Processor
Lucent Technologies Inc.
47
5 Software Architecture (continued)
5.1
Instruction Set (continued)
5.1.7 Cache Instructions
Each cache instruction requires one program-memory word. Table 32 shows cache instructions and their required
numbers of instruction cycles. Control instructions and long immediate values cannot be stored inside the cache.
Cache instruction formats are as follows:
do K {
INSTR_1
INSTR_2
.
INSTR_NI
}
redo K
When the cache is used to execute a block of instructions, the cycle timings of the instructions are as follows:
s
In the first pass, the instructions are fetched from program memory and the cycle times are the normal out-of-
cache values, except for the last instruction in the block of NI instructions. This instruction executes in two cycles.
s
During pass two through pass K – 1, each instruction is fetched from cache and the in-cache timings apply.
s
During the last (Kth) pass, the block of instructions is fetched from cache and the in-cache timings apply, except
that the timing of the last instruction is the same as if it were out-of-cache.
The redo instruction treats the instructions currently in the cache memory as another loop to be executed K times.
Using the redo instruction, instructions are re-executed from the cache without reloading the cache.
The number of iterations, K, for a do or redo can be set at run time by first moving the number of iterations into the
cloop register (7 bits unsigned), then issuing the do cloop or redo cloop. At the completion of the loop, the value
of cloop is decremented to 0; hence, cloop needs to be written before each do cloop or redo cloop.
Table 32. Cache Instructions
Cache Instructions
Number of Cycles
do
1
redo
2
Table 33. Replacement Table for Cache Instructions
Replace
Instruction
Encoding
Meaning
Kcloop*
* The assembly-language statement, do cloop (or redo cloop) is used to specify that the number of iterations is to be taken from the cloop
register. K is encoded as 0 in the instruction encoding to select cloop.
Number of times the instructions are to be executed taken from bits 6:0 of the cloop
register.
1 to 127
Number of times the instructions are to be executed is encoded in the instruction.
NI
1 to 15
1 to 15 instructions can be included.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
B901 制造商:EDAL 制造商全稱:EDAL 功能描述:Silicon Bridge Rectifier
B901 10.0MM 制造商:DORMER TOOLS 功能描述:M/C REAMER B901 10.0MM
B901 4.0MM 制造商:DORMER TOOLS 功能描述:M/C REAMER B901 4.0MM
B901 5.0MM 制造商:DORMER TOOLS 功能描述:M/C REAMER B901 5.0MM
B901 8.0MM 制造商:DORMER TOOLS 功能描述:M/C REAMER B901 8.0MM
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