參數(shù)資料
型號(hào): B900M24FXX12IT
元件分類: 數(shù)字信號(hào)處理
英文描述: 0-BIT, 59.88 MHz, OTHER DSP, PQCC44
文件頁數(shù): 30/100頁
文件大小: 1547K
代理商: B900M24FXX12IT
Lucent Technologies Inc.
35
Advance Data Sheet
B900
July 1999
Baseband Signal Processor
4 Hardware Architecture (continued)
4.10 Dual-Channel Serial I/O Port (SIO) for B900 (continued)
4.10.1 B900 SIO Architecture
Figure 8 shows the block diagram of the B900 SIO.
5-6153 (F)
Figure 8. B900 SIO Block Diagram
The SIO data register (sdx) is composed of an 80-bit shift register, multiplexing logic, and read/write pointers. The
shift register is divided into five individually addressable 16-bit registers, sdx[0:4]. The write pointer selects one of
these 16-bit registers to be loaded with serial output data. The DSP1600 core transfers data to the SIO through the
internal data bus (IDB). Data is loaded starting with the last register (sdx[4]) and ending with the first register
(sdx[0]).
CHANNEL
CONTROL
IDB
WRSIOC
RDSIOC
SIOC
CLOCK
GENERATOR
INPUT CLOCK
SCLK
SLDA
SLDB
LOADCLK
SHIFTCLK
FRAME
CONTROL
FRAME_END
CHANNEL
DUAL
INTERRUPT
GENERATOR
SIOA
SIOB
RDSDX
5:1 MUX
IDB
80-bit SHIFT REG
SDO
1:5 DEMUX
WRSDX
SDI
80
SIOCOL
3
READ
POINTER
BURST
2
3
WRITE
POINTER
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