參數(shù)資料
型號(hào)： B900M24FXX12IT
元件分類： 數(shù)字信號(hào)處理
英文描述： 0-BIT, 59.88 MHz, OTHER DSP, PQCC44
文件頁數(shù)： 31/100頁
文件大?。?/td> 1547K
代理商： B900M24FXX12IT
36
Lucent Technologies Inc.
B900
Advance Data Sheet
Baseband Signal Processor
July 1999
4 Hardware Architecture (continued)
4.10 Dual-Channel Serial I/O Port (SIO) for B900 (continued)
4.10.2 B900 SIO Operation
Figure 9 illustrates the operation of the SIO for one setting in both cases.
5-6156 (F)
Figure 9. 64-Bit and 80-Bit Serial Transfer in Active, Single-Channel Mode
At the end of a serial transfer, an SIOA interrupt is generated to the DSP1600 core. The user should generate code
that services this interrupt before the next serial transmission occurs in order to ensure that proper data is transmit-
ted. Since the SIO does not buffer the serial data, the user needs to read the serial input data before writing new
output data for 64-bit and 80-bit transfers; otherwise, the output data will clobber the input data in the shift register.
For 16-bit transfers, it does not matter whether a write is performed before a read, since data transfers occur from
opposite ends of the shift register.
The read/write pointers point to the 16-bit segment in the shift register from/to which serial data is transferred. Table
20 shows the reset state of the pointers and the addressing sequence for multiple reads/writes. At the beginning of
every serial frame, the SIO resets the pointers to their default address. The pointers are designed to wrap around at
the end of every sequence. The pointers continue to operate even when the SIO is disabled, allowing the sdx regis-
ter to be initialized with data.
Keep in mind that the pointers retain their state even when the SIO is halted. If the sdx register is written just before
the SIO is halted, serial output data may be written to an unintended 16-bit segment when the sdx register is reini-
tialized and the SIO restarted.
For dual-channel operation, serial transfer begins with channel A when the SIO is first enabled and SLDA starts out
in the high phase. The SIOA interrupt indicates that serial input data was received for channel A and that the user
should load serial output data to be sent out in the next frame for channel B. The SIOB interrupt indicates that data
was received for channel B and the user must load the data for channel A.
Table 20. SIO Read/Write Pointer Operation
Pointer
Reset Address
Addressing Sequence
Write
sdx4
sdx4, sdx3, sdx2, sdx1, sdx0, sdx4, . . .
Read (16-bit)
(64-bit)
(80-bit)
sdx0
sdx3
sdx4
sdx0, sdx1, sdx2, sdx3, sdx4, sdx0, . . .
sdx3, sdx2, sdx1, sdx0, sdx3, . . .
sdx4, sdx3, sdx2, sdx1, sdx0, sdx4, . . .
B63
B62
B61
B60
B59
B4
B3
B2
B1
B0
SCLK
SDO OR
SDI
SLDA
LDTA = 0, DLP = 0
B79
B78
B77
B76
B75
B20
B19
B18
B17
B16
B3
B2
B1
B0
64-bit
TRANSFER
80-bit
TRANSFER
SDO OR
SDI
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參數(shù)描述
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