參數(shù)資料
型號： B900J24FXX12IT
元件分類： 數(shù)字信號處理
英文描述： 0-BIT, 59.88 MHz, OTHER DSP, PQFP44
文件頁數(shù)： 64/100頁
文件大小： 1547K
代理商： B900J24FXX12IT
66
Lucent Technologies Inc.
B900
Advance Data Sheet
Baseband Signal Processor
July 1999
5 Software Architecture (continued)
5.4
Instruction Set Formats (continued)
5.4.6 Field Descriptions
T Field: Specifies the type of instruction.
aT Field: Specifies a transfer accumulator.
B Field: Specifies the type of branch instruction.
CON Field: Specifies the condition for special
functions and conditional control instructions.
D Field: Specifies a destination register.
Table 70. T Field
T
Operation
ALU
Type
Format
0000x
00010
00011
00100
goto JA
short IM9 j, k, rb, re
short IM9 r0, r1, r2, r3
Y = a1[l]
F1*
4
9
1
00101
00110
00111
01000
Z:aT[l]
Y
aT[l] = Y
Bit 0 = 0, aT = R
Bit 0 = 1, aTl = R
F1
2a
1
1a
7
01001
01010
01011
01100
Bit 10 = 0, R = a0
Bit 10 = 1, R = a0l
R = IM16
Bit 10 = 0, R = a1
Bit 10 = 1, R = a1l
Y = R
7
8
7
01101
01110
01111
1000x
Z:R
Do, Redo
R = Y
call JA
7
10
7
4
10010
10011
10100
10101
ifc CON
if CON
Y = y[l]
Z:y[l]
F2
F2
F1
3
1
2
10110
10111
11000
11001
x = Y
y[l] = Y
Bit 0 = 0, branch indirect
Bit 0 = 1
y = a0, x = X
F1
F3
1
5
3a
1
11010
11011
11100
11101
11110
11111
Conditional branch qualifier
y = a1, x = X
Y = a0[l]
Z:y, x = X
Bit 5 = 0, F4 ALU (BMU)
Bit 5 = 1, direct addressing
y = Y, x = X
F1
6
1
2
3b
9a
1
Table 71. aT Field
aT
Register
0
Accumulator 1
1
Accumulator 0
Table 72. B Field
BOperation
000
return
001
ireturn
010
goto pt
011
call pt
1XX
Reserved
Table 73. CON Field
CON
Condition
CON
Condition
00000
00001
00010
00011
mi
pl
eq
ne
10000
10001
10010
10011
gt
le
pllon
slowon
00100
00101
00110
00111
lvs
lvc
mvs
mvc
10100
10101
10110
10111
plloff
slowoff
stopclk
evenp
01000
01001
01010
01011
heads
tails
c0ge
c0lt
11000
11001
11010
11011
mns1
nmns1
npint
njint
01100
01101
01110
01111
c1ge
c1lt
true
false
11100
11101
11110
11111
oddp
rfrsh
Reserved
Table 74. D Field
DRegister
0
Accumulator 0
1
Accumulator 1
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