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參數(shù)資料
| 型號： | ADV7311KST |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 62/84頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC VID ENC 6-12BIT DAC'S 64LQFP |
| 產(chǎn)品變化通告： | ADV7xxx Obsolescence 16/Jan/2012 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | 視頻編碼器 |
| 應(yīng)用： | DVD，SD/HD |
| 電壓 - 電源，模擬： | 2.5V |
| 電壓 - 電源，數(shù)字： | 2.5V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 64-LQFP |
| 供應(yīng)商設(shè)備封裝： | 64-LQFP（14x14） |
| 包裝： | 托盤 |
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REV. A
ADV7310/ADV7311
–65–
The following register settings are used to generate an SD NTSC
CVBS output on DAC A:
Register
Subaddress
Setting
00h
80h
40h
10h
42h
40h
44h
40h
4Ah
08h
All other registers are set as normal/default.
For PAL CVBS output on DAC A, the same settings are used
except that subaddress = 40h and register setting = 11h.
The following register settings are used to generate an SD NTSC
black bar pattern output on DAC A:
Register
Subaddress
Setting
00h
80h
02h
04h
40h
10h
42h
40h
44h
40h
4Ah
08h
All other registers are set as normal/default.
For PAL black bar pattern output on DAC A, the same settings
are used except that subaddress = 40h and register setting = 11h.
The following register settings are used to generate a 525p hatch
pattern on DAC D:
Register
Subaddress
Setting
00h
10h
01h
10h
40h
11h
05h
16h
A0h
17h
80h
18h
80h
All other registers are set as normal/default.
For 625p hatch pattern on DAC D, the same register settings
are used except that subaddress = 10h and register setting = 50h.
For a 525p black bar pattern output on DAC D, the same settings
are used as above except that subaddress = 02h and register
setting = 24h.
For 625p black bar pattern output on DAC D, the same settings
are used as above except that subaddress = 02h and register
setting = 24h; and subaddress = 10h and register setting = 50h.
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相關(guān)代理商/技術(shù)參數(shù) |
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| ADV7311KST | 制造商:Analog Devices 功能描述:Video IC |
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