參數(shù)資料
型號: ADV7162KS220
廠商: ANALOG DEVICES INC
元件分類: 顯示控制器
英文描述: 96-Bit, 220 MHz True-Color Video RAM-DAC
中文描述: 1600 X 1200 PIXELS PALETTE-DAC DSPL CTLR, PQFP160
封裝: PLASTIC, QFP-160
文件頁數(shù): 5/44頁
文件大?。?/td> 668K
代理商: ADV7162KS220
ADV7160/ADV7162
REV. 0
–5–
JTAG P
ORT
Parameter
All Versions
Units
Conditions/Comments
PLL PERFORMANCE
4
Jitter
PLL REFERENCE INPUT
PLL
REF
Frequency
250
ps rms
1
σ
900
40
2.0
0.8
25
1.67
40
60
kHz min
MHz max
V max
V min
ns min
μ
s max
% min
% max
V
IH
V
IL
PLL
REF
Period
PLL
REF
Duty Cycle
JTAG PERFORMANCE
TCK Frequency, t
29
TCK High Time, t
30
TCK
Low Time, t
31
TDI, TMS Setup Time, t
32
TDI, TMS Hold Time, t
33
Digital Input to
TCK
Setup Time, t
34
Digital Input to
TCK
Hold Time, t
35
TCLK to TDO Drive, t
36
TCLK to TDO Valid, t
37
TCLK to TDO Three-State, t
38
20
15
15
15
15
15
15
0
20
5
15
MHz max
ns min
ns min
ns max
ns max
ns max
ns max
ns min
ns min
ns min
ns max
NOTES
1
TTL input values are 0 to 3 volts, with input rise/fall times
3 ns, measured between the 10% and 90% points. Timing reference points at 50% for inputs and outputs.
2
±
5% for all versions.
3
Temperature range (T
MIN
to T
MAX
); 0
°
C to +70
°
C.
4
Jitter is measured by triggering on the output clock, delayed by 15
μ
s and then measuring the time period from the trigger edge to the next edge of the output clock
after the delay. This measurement is repeated multiple times and the RMS value is determined.
Specifications subject to change without notice.
t
38
t
36
t
37
t
35
t
34
t
33
t
30
t
32
t
29
t
31
TCK
TMS, TDI
DIGITAL
INPUT
TDO
TDO
Figure 2. JTAG Timing
TIMING CHARACTERISTICS (Cont.)
1
(V
AA2
= +5 V; V
REF
= +1.235 V; R
SET
= 280
. IOR, IOG, IOB (R
L
= 37.5
, C
L
=10 pF).
All specifications T
MIN
to T
MAX3
unless otherwise noted.)
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