參數(shù)資料
型號(hào)： USB-I2C/LIN-CONV-Z
廠商： Analog Devices Inc
文件頁數(shù)： 56/104頁
文件大小： 0K
描述： USB TO I2C/LIN CONV BOARD
標(biāo)準(zhǔn)包裝： 1
附件類型： 適配器板
適用于相關(guān)產(chǎn)品： ARM7TDMI?
Data Sheet
ADuC7019/20/21/22/24/25/26/27/28/29
Rev. F | Page 55 of 104
Reset Operation
There are four kinds of reset: external, power-on, watchdog
expiration, and software force. The RSTSTA register indicates
the source of the last reset, and RSTCLR allows clearing of the
RSTSTA register. These registers can be used during a reset
exception service routine to identify the source of the reset.
If RSTSTA is null, the reset is external.
Table 44. REMAP Register
Name
Address
Default Value
Access
REMAP
0xFFFF0220
0xXX1
R/W
1
Depends on the model.
Table 45. REMAP MMR Bit Designations
Bit
Name
Description
4
Read-only bit. Indicates the size of the Flash/EE
memory available. If this bit is set, only 32 kB of
Flash/EE memory is available.
3
Read-only bit. Indicates the size of the SRAM
memory available. If this bit is set, only 4 kB of
SRAM is available.
2:1
Reserved.
0
Remap
Remap bit. Set by user to remap the SRAM to
Address 0x00000000. Cleared automatically
after reset to remap the Flash/EE memory to
Address 0x00000000.
Table 46. RSTSTA Register
Name
Address
Default Value
Access
RSTSTA
0xFFFF0230
0x01
R/W
Table 47. RSTSTA MMR Bit Designations
Bit
Description
7:3
Reserved.
2
Software reset. Set by user to force a software reset.
Cleared by setting the corresponding bit in RSTCLR.
1
Watchdog timeout. Set automatically when a watchdog
timeout occurs. Cleared by setting the corresponding
bit in RSTCLR.
0
Power-on reset. Set automatically when a power-on
reset occurs. Cleared by setting the corresponding bit
in RSTCLR.
Table 48. RSTCLR Register
Name
Address
Default Value
Access
RSTCLR
0xFFFF0234
0x00
W
Note that to clear the RSTSTA register, the user must write 0x07
to the RSTCLR register.
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