
CHAPTER 3 CPU FUNCTION
103
Preliminary User’s Manual U16031EJ2V1UD
(19/26)
Bit Units for Manipulation
Address
Function Register Name
Symbol
R/W
1 Bit
8 Bits 16 Bits
After Reset
FFFFFF38H
UF0 configuration/interface/
endpoint descriptor register 85
UF0CIE85
R/W
√
Undefined
FFFFFF39H
UF0 configuration/interface/
endpoint descriptor register 86
UF0CIE86
R/W
√
Undefined
FFFFFF3AH
UF0 configuration/interface/
endpoint descriptor register 87
UF0CIE87
R/W
√
Undefined
FFFFFF3BH
UF0 configuration/interface/
endpoint descriptor register 88
UF0CIE88
R/W
√
Undefined
FFFFFF3CH
UF0 configuration/interface/
endpoint descriptor register 89
UF0CIE89
R/W
√
Undefined
FFFFFF3DH
UF0 configuration/interface/
endpoint descriptor register 90
UF0CIE90
R/W
√
Undefined
FFFFFF3EH
UF0 configuration/interface/
endpoint descriptor register 91
UF0CIE91
R/W
√
Undefined
FFFFFF3FH
UF0 configuration/interface/
endpoint descriptor register 92
UF0CIE92
R/W
√
Undefined
FFFFFF40H
UF0 configuration/interface/
endpoint descriptor register 93
UF0CIE93
R/W
√
Undefined
FFFFFF41H
UF0 configuration/interface/
endpoint descriptor register 94
UF0CIE94
R/W
√
Undefined
FFFFFF42H
UF0 configuration/interface/
endpoint descriptor register 95
UF0CIE95
R/W
√
Undefined
FFFFFF43H
UF0 configuration/interface/
endpoint descriptor register 96
UF0CIE96
R/W
√
Undefined
FFFFFF44H
UF0 configuration/interface/
endpoint descriptor register 97
UF0CIE97
R/W
√
Undefined
FFFFFF45H
UF0 configuration/interface/
endpoint descriptor register 98
UF0CIE98
R/W
√
Undefined
FFFFFF46H
UF0 configuration/interface/
endpoint descriptor register 99
UF0CIE99
R/W
√
Undefined
FFFFFF47H
UF0 configuration/interface/
endpoint descriptor register 100
UF0CIE100
R/W
√
Undefined
FFFFFF48H
UF0 configuration/interface/
endpoint descriptor register 101
UF0CIE101
R/W
√
Undefined
FFFFFF49H
UF0 configuration/interface/
endpoint descriptor register 102
UF0CIE102
R/W
√
Undefined
FFFFFF4AH
UF0 configuration/interface/
endpoint descriptor register 103
UF0CIE103
R/W
√
Undefined
FFFFFF4BH
UF0 configuration/interface/
endpoint descriptor register 104
UF0CIE104
R/W
√
Undefined
FFFFFF4CH
UF0 configuration/interface/
endpoint descriptor register 105
UF0CIE105
R/W
√
Undefined
FFFFFF4DH
UF0 configuration/interface/
endpoint descriptor register 106
UF0CIE106
R/W
√
Undefined