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參數(shù)資料
| 型號： | UJA1061 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Low speed CAN/LIN system basis chip |
| 中文描述： | 低高速CAN / LIN系統(tǒng)基礎(chǔ)芯片 |
| 文件頁數(shù)： | 3/81頁 |
| 文件大?。?/td> | 323K |
| 代理商： | UJA1061 |
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2004 Mar 22
3
Philips Semiconductors
Objective specification
Low speed CAN/LIN system basis chip
UJA1061
1
FEATURES
1.1
General
Excellent EMC performance
±
8 kV ESD protection (human body model) for the
outside module pins
CAN/LIN-bus pins are short-circuit proof to the battery
(up to 60 V) and to ground
Battery and CAN/LIN-bus pins are protected against
transients that occur in an automotive environment
(ISO7637)
Software Development mode partly disabling of fail-safe
and watchdog functionality to ease software
development
Unique SPI readable device type identification
Small footprint HTSSOP32 package (body 6
×
11 mm)
with low thermal resistance.
1.2
System features
12 V, 24 V and 42 V system support with low sleep
current (typical 50
μ
A)
Support of 2.5, 3.0, 3.3 and 5.0 V microcontrollers with
automatic adaption of interface levels to
microcontrollers
Flexible, independent external regulator extension via
14 V battery related pin INH (enables fail-safe scalable
supply system)
Smart operating and power management modes
In-field Flash Programming mode
Cyclic wake-up capability in Standby and Sleep mode
Remote wake-up capability via CAN and LIN buses
Local WAKE port with cyclic supply feature
42 V battery related local wake-up input
42 V battery related high-side switch output to drive
external loads such as relays and wake-up switches
Interrupt output with 12 maskable interrupt sources:
– Interrupt service monitor
– One interrupt per watchdog period to prevent
microcontroller overloading; ensures predictable
software behaviour
Extensive set of SPI-readable system diagnostics:
– Detection and detailed error reporting on CAN and
LIN bus failures (e.g. shorts to GND/BAT, open bus
wires, etc.)
– TxD dominant and RxD recessive clamping as well
as RxD to TxD short detection to prevent bus
deadlocks
– Local ECU ground-shift detection with two selectable
thresholds
– Over-temperature warning
– Battery monitoring to detect battery interrupt or a
chattering battery contact to store data before
microcontroller power down (e.g. to store seat
position)
– Signalling of potential RAM-retention errors due to
low microcontroller V
CC
.
1.3
Fail-safe features
Programmable fail-safe coded window and time-out
watchdog with on-chip oscillator, guaranteeing
autonomous fail-safe system supervision
Fail-safe coded 16-bit SPI interface to microcontroller,
including chip-select pin for multiple SPI devices on the
same bus
Integrated fail-safe and system features:
– Rigorous error handling based on diagnostics
– 12 dedicated reset sources supporting different,
history dependent, software start-up and diagnosis
– Global enable pin for control of safety critical
hardware
– Limp home output signal for activating application
hardware in case system enters Fail-safe mode
(e.g. switch on parking lights)
– Single SPI message; no assembly of multiple SPI
frames
– Programmable active-low system reset with
detection of both clamped and open reset line to
prevent system deadlocks
– Fail-safe coded activation of Software Development
mode and Flash mode
– 24-bit access-protected RAM can be used, for
instance, for logging of cyclic problems.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| UJA1061_10 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Fault-tolerant CAN/LIN fail-safe system basis chip |
| UJA1061TW | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Fault-tolerant CAN/LIN fail-safe system basis chip |
| UJA1061TW/3V0,512 | 制造商:NXP Semiconductors 功能描述: |
| UJA1061TW/3V0512 | 制造商:NXP Semiconductors 功能描述:CONTROLLER SYS CAN/LIN 3V 32HTSSOP |
| UJA1061TW/3V3/C/T, | 功能描述:CAN 接口集成電路 FT CAN/LIN fail-safe system basis chip RoHS:否 制造商:Texas Instruments 類型:Transceivers 工作電源電壓:5 V 電源電流: 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:SOIC-8 封裝:Tube |
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