參數(shù)資料
型號: UDA1384
廠商: NXP Semiconductors N.V.
英文描述: Multichannel audio coder-decoder
中文描述: 多聲道音頻編碼解碼器
文件頁數(shù): 25/55頁
文件大?。?/td> 276K
代理商: UDA1384
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11.2 Register mapping
9
P
R
2
P
U
M
Table 21:
Add
System settings
00h
system
UDA1384 register mapping
[1]
Function
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
RST
[2]
-
DC
1
-
0
VFS1
0
PAB
0
-
0
VFS0
0
PAA
0
-
0
VCE
1
MTB
0
-
0
VAP
0
MTA
0
-
0
DSD
0
AIF2
0
-
0
SC1
0
AIF1
0
-
0
SC0
0
AIF0
0
-
0
OP1
0
DAG
0
BCK1
0
OP0
0
FIL
0
BCK0
1
FS1
0
DVD
0
WSM
1
FS0
1
DIS1
0
VH1
0
ACE
1
DIS0
0
VH0
1
ADP
0
DIF2
0
PVA
0
DCE
1
DIF1
0
MTV
0
DAP
0
DIF0
0
VIF
0
01h
audioADCandDAC
subsystem
02h
voice ADC system
Status (read out only)
0Fh
status outputs
Interpolator settings
10h
DAC channel and
feature selection
-
-
-
-
-
-
-
-
-
-
VS
AS1
AS0
DS2
DS1
DS0
MIX1
0
ICS1
0
ICS1
0
-
0
ICS1
0
-
0
ICS1
0
-
0
ICS1
0
MIX0
0
ICS0
0
ICS0
0
-
0
ICS0
0
-
0
ICS0
0
-
0
ICS0
0
MC5
0
DE2
0
DE2
0
DE2
0
DE2
0
DE2
0
DE2
0
DE2
0
-
0
MC4
0
DE1
0
DE1
0
DE1
0
DE1
0
DE1
0
DE1
0
DE1
0
-
0
MC3
0
DE0
0
DE0
0
DE0
0
DE0
0
DE0
0
DE0
0
DE0
0
-
0
MC2
0
PD
0
PD
0
PD
0
PD
0
PD
0
PD
0
PD
0
PD
0
MC1
0
MT
0
MT
0
MT
0
MT
0
MT
0
MT
0
MT
0
MT
0
MC0
0
QM
0
QM
0
QM
0
QM
0
QM
0
QM
0
QM
0
QM
0
SEL1
0
VC7
0
VC7
0
VC7
0
VC7
0
VC7
0
VC7
0
VC7
0
VC7
0
SEL0
0
VC6
0
VC6
0
VC6
0
VC6
0
VC6
0
VC6
0
VC6
0
VC6
0
CS5
0
VC5
0
VC5
0
VC5
0
VC5
0
VC5
0
VC5
0
VC5
0
VC5
0
CS4
0
VC4
0
VC4
0
VC4
0
VC4
0
VC4
0
VC4
0
VC4
0
VC4
0
CS3
0
VC3
0
VC3
0
VC3
0
VC3
0
VC3
0
VC3
0
VC3
0
VC3
0
CS2
0
VC2
0
VC2
0
VC2
0
VC2
0
VC2
0
VC2
0
VC2
0
VC2
0
CS1
0
VC1
0
VC1
0
VC1
0
VC1
0
VC1
0
VC1
0
VC1
0
VC1
0
CS0
0
VC0
0
VC0
0
VC0
0
VC0
0
VC0
0
VC0
0
VC0
0
VC0
0
11h
DAC feature control
12h
DAC channel 1
13h
DAC channel 2
14h
DAC channel 3
15h
DAC channel 4
16h
DAC channel 5
17h
DAC channel 6
18h
DAC mixing
channel 1
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