參數(shù)資料
型號(hào)： UDA1384
廠商： NXP Semiconductors N.V.
英文描述： Multichannel audio coder-decoder
中文描述： 多聲道音頻編碼解碼器
文件頁(yè)數(shù)： 23/55頁(yè)
文件大小： 276K
代理商： UDA1384
9397 750 14366
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 — 17 January 2005
23 of 55
Philips Semiconductors
UDA1384
Multichannel audio coder-decoder
7. Then the microcontroller generates the device address ‘0011 000’ again, but this time
followed by a logic 1 (read) of the R/W bit. An acknowledge is followed from the
UDA1384.
8. The UDA1384 sends 2 bytes data with the Most Significant (MS) byte first and then
the Least Significant (LS) byte. After each byte an acknowledge is followed from the
microcontroller (master).
9. If repeated groups of 2 bytes are transmitted, then the register address is auto
incremented. After each byte an acknowledge is followed from the microcontroller.
10.The microcontroller stops this cycle by generating a Negative Acknowledge (NA).
11.Finally, the UDA1384 frees the I
2
C-bus and the microcontroller can generate a stop
condition (P).
[1]
Auto increment of register address.
11. Register mapping
In this chapter the register addressing and mapping of the microcontroller interface of the
UDA1384 is given.
In
Table 20
an overview of the register mapping is given.
In
Table 21
the actual register mapping is given and the register definitions are explained
in
Section 11.3
to
Section 11.14
.
11.1 Address mapping
Table 19:
Device
address
S
0011 000 0
A = acknowledge from UDA1384
Master transmitter reads from the UDA1384 registers in the I
2
C-bus mode
R/W
Register
address
address
A
ADDR
A
Sr 0011 000 1 A
Device
R/W Data 1
Data 2
[1]
Data n
[1]
MS1 A
A = acknowledge from master
LS1
A
MS2 A
LS2
A
MSn A
LSn
NA
P
Table 20:
Address
System settings
00h
01h
02h
Status (read out registers)
0Fh
status outputs
Interpolator settings
10h
DAC channel and feature selection
11h
DAC feature control
12h
DAC channel 1
13h
DAC channel 2
14h
DAC channel 3
15h
DAC channel 4
Overview of register mapping
Function
system
audio ADC and DAC subsystem
voice ADC system
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