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參數(shù)資料
| 型號(hào)： | UDA1384 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Multichannel audio coder-decoder |
| 中文描述： | 多聲道音頻編碼解碼器 |
| 文件頁數(shù)： | 16/55頁 |
| 文件大?。?/td> | 276K |
| 代理商： | UDA1384 |
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9397 750 14366
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 — 17 January 2005
16 of 55
Philips Semiconductors
UDA1384
Multichannel audio coder-decoder
The data transfer mode is characterized by signal L3MODE = HIGH and is used to
transfer one or more bytes representing a register address, instruction or data.
Basically, two types of data transfers can be defined:
Write action: data transfer
to
the device
Read action: data transfer
from
the device.
9.2 Device addressing
The device address consists of one byte with:
Data Operating Mode (DOM) bits 0 and 1 representing the type of data transfer (see
Table 13
)
Address bits 2 to 7 representing a 6-bit device address. The address of the UDA1384
is 01 0100 (bits 2 to 7).
9.3 Register addressing
After sending the device address (including DOM bits), indicating whether the information
is to be read or written, one data byte is sent using bit 0 to indicate whether the
information will be read or written and bits 1 to 7 for the destination register address.
Basically, there are 3 methods for register addressing:
1. Addressing for write data: bit 0 is logic 0 indicating a write action to the destination
register, followed by bits 1 to 7 indicating the register address (see
Figure 11
).
2. Addressing for prepare read: bit is logic 1, indicating that data will be read from the
register (see
Figure 12
).
3. Addressing for data read action. Here, the device returns a register address prior to
sending data from that register. When bit 0 is logic 0, the register address is valid;
when bit 0 is logic 1, the register address is invalid (see
Figure 12
).
Table 13:
DOM
Selection of data transfer
Transfer
Bit 1
0
0
1
1
Bit 0
0
1
0
1
not used
not used
write data or prepare read
read data
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PDF描述 |
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| UDN2878W-2 | 10A SCRS |
| UDZ2.4B | Low Current Operation at 250 ，Low Reverse Leakage,Low Noise Zener Diode |
| UDZ10B | Low Current Operation at 250 ，Low Reverse Leakage,Low Noise Zener Diode |
| UDZ12B | Low Current Operation at 250 ，Low Reverse Leakage,Low Noise Zener Diode |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| UDA1384H | 功能描述:編碼器、解碼器、復(fù)用器和解復(fù)用器 LO CST MULTICH CODEC RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時(shí)間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
| UDA1384H/N1,518 | 功能描述:編碼器、解碼器、復(fù)用器和解復(fù)用器 LOW COST MULTICHANNEL CODEC RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時(shí)間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
| UDA1384H/N1,557 | 功能描述:編碼器、解碼器、復(fù)用器和解復(fù)用器 LOW COST MULTICHANNEL CODEC RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時(shí)間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
| UDA1384H-T | 功能描述:編碼器、解碼器、復(fù)用器和解復(fù)用器 LO CST MULTICH CODEC RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時(shí)間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
| UDA1431T | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:16-bit, 48 kHz, low-cost stereo current DAC |
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