- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄385940 > TMS320VC203 (Texas Instruments, Inc.) Digital Signal Processors(50ns指令周期， 空閑狀態(tài)CPU全關(guān)斷，先進(jìn)的外圍，多種PLL可選) PDF資料下載
參數(shù)資料
| 型號(hào)： | TMS320VC203 |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | 數(shù)字信號(hào)處理 |
| 英文描述： | Digital Signal Processors(50ns指令周期， 空閑狀態(tài)CPU全關(guān)斷，先進(jìn)的外圍，多種PLL可選) |
| 中文描述： | 數(shù)字信號(hào)處理器（50ns的指令周期，空閑狀態(tài)CPU的全關(guān)斷，先進(jìn)的外圍，多種鎖相環(huán)可選） |
| 文件頁數(shù)： | 27/67頁 |
| 文件大?。?/td> | 1452K |
| 代理商： | TMS320VC203 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁當(dāng)前第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁
TMS320C203, TMS320C209, TMS320VC203
DIGITAL SIGNAL PROCESSORS
SPRS025 – JUNE 1995
27
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
reset (continued)
Please note that the reset action halts all operations whether complete or not. Therefore, the state of the system
and its data cannot be maintained through the reset operation. For example, if the device is writing to an external
resource when the reset is initiated, the write is aborted. This can and will corrupt data in system resources.
Therefore it is necessary to reinitialize the system after a reset.
power-down modes
The ’C2xx implements several power-down modes in which the ’C2xx core enters a dormant state and
dissipates considerably less power. A power-down mode is invoked either by executing the IDLE instruction
or by driving the HOLD (’C203 only) input low. When the HOLD signal initiates the power-down mode, on-chip
peripherals continue to operate; this power-down mode is terminated when HOLD goes inactive (’C203 only).
While the ’C2xx is in a power-down mode, all of its internal contents are maintained; this allows operation to
continue unaltered when the power-down mode is terminated. All CPU activities are halted when the IDLE
instruction is executed, but the CLKOUT1 pin remains active depending on status of IC register (’C203 only).
The peripheral circuits continue to operate, allowing peripherals such as serial ports and timers to take the CPU
out of its powered-down state. A power-down mode, when initiated by an IDLE instruction, is terminated upon
receipt of an interrupt.
software-controlled wait-state generator
Due to the fast cycle time of the TMS320C2xx devices, it is often necessary to operate with wait states to
interface with external logic and memory. For many systems, one wait state is adequate.
TMS320C209
When operating the TMS320C209 at full speed, it is difficult to respond fast enough to provide a READY-based
wait state for the first cycle. For this reason, the TMS320C209 includes a simple software-controlled wait-state
generator to provide the first wait state.
The software-controlled wait-state generator can be programmed to generate the first wait state for a given
external space. The WSGR has four bits: AVIS, DATA, PROG, and IO. The wait-state generator inserts a wait
state to a given memory space if the respective bit is set to 1, regardless of the condition of the READY signal.
Then READY can be used to further extend wait states. The AVIS bit differs from the other WSGR bits because
it doesn’t generate a wait state but enables the address-visibility mode of the ’320C209. This mode allows the
internal program address to be presented to the address bus when this bus is not used for an external access.
The WSGR bits are initially set to 1 by reset so that the device can operate from slow memory. After initialization,
the AVIS bit should be set to 0 for production systems to reduce power and noise. The WSGR register (shown
in Figure 4 and Table 12) resides at I/O port 0xFFFF.
3
2
1
0
AVIS
ISWS
DSWS
PSWS
Figure 4. TMS320C209 Wait-State Generator Control Register (WSGR)
A
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TN-83 | MICROWAVE NOISE TUBES & NOISE SOURCES |
| TN-101 | CONNECTOR ACCESSORY |
| TN-102 | MICROWAVE NOISE TUBES & NOISE SOURCES |
| TN-103 | MICROWAVE NOISE TUBES & NOISE SOURCES |
| TN-104 | CONNECTOR ACCESSORY |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TMS320VC33PGE120 | 功能描述:數(shù)字信號(hào)處理器和控制器 - DSP, DSC Digital Signal Proc RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
| TMS320VC33PGE-120 | 制造商:Texas Instruments 功能描述:IC DSP PROCESSOR 320VC33 LQFP144 制造商:Texas Instruments 功能描述:IC, DSP PROCESSOR, 320VC33, LQFP144 |
| TMS320VC33PGE-120 | 制造商:Texas Instruments 功能描述:IC DSP PROCESSOR 320VC33 LQFP144 |
| TMS320VC33PGE120G4 | 功能描述:數(shù)字信號(hào)處理器和控制器 - DSP, DSC Digital Signal Proc RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
| TMS320VC33PGE150 | 功能描述:數(shù)字信號(hào)處理器和控制器 - DSP, DSC Digital Signal Proc RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。