參數(shù)資料
型號： TMS320AV220
廠商： Texas Instruments, Inc.
英文描述： Video CD MPEG Decoder(視頻CD MPEG編碼器)
中文描述： 視頻CD MPEG解碼器（視頻光盤的MPEG編碼器）
文件頁數(shù)： 21/31頁
文件大?。?/td> 612K
代理商： TMS320AV220
TMS320AV220
VIDEO CD MPEG DECODER
SCSS016A – JUNE 1994 – REVISED JANUARY 1996
21
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
memory-design guidelines
When designing DRAM arrays for use with the ’AV220, the following guidelines should be followed:
When using 256K
×
16 DRAMs, connect all ten address lines to the DRAMs. This allows DRAMs with either ten
row and eight column address lines or nine row and nine column address lines to be used. The tenth address
bit on 256K
×
16 DRAMs is located on pin 15 of SOJ packages, pin 17 of TSOP packages and pin 25 of ZIP
packages. This pin has no effect on DRAMs with nine row and nine column addresses. Memory arrays designed
to use 256K
×
16 DRAMs should use only nine of the ten address lines (MA8–MA0). The ’AV220 supports both
of these memory organizations by duplicating column address bit nine in the tenth location of the row address
as shown in Figure 8.
A9
A18
A17
A16
A15
A14
A13
A12
A11
A10
Row Address
9
8
7
6
5
4
3
2
1
0
A9
A8
A7
A6
A5
A4
A3
A2
A1
Column Address
9
8
7
6
5
4
3
2
1
0
Figure 8. DRAM-Address-Bus Configuration
The LCAS and UCAS signals should be routed from the DRAM mechanically farthest from the ’AV220 to LCASIN
and UCASIN. This gives the CASIN signal a delay path similar to the path of the DRAM read data to the ’AV220.
Since the ’AV220 performs byte-wide writes to DRAM; 256K
×
16 DRAMs with a single CAS input can not be
used.
The elimination of all possible DRAM noise is critical to proper board layout. It is important that the DRAM be
placed near the ’AV220. The layout should use terminations and have a clean ground and V
CC
plane below the
DRAM and those portions of the ’AV220 that connect to it. If possible, no other signals or clocks should be passed
under the DRAMs or their traces.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
CC
(see Note 1)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, V
I
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage range, V
O
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, I
IK
(V
I
< 0 or V
I
> V
CC
)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, I
OK
(V
O
< 0 or V
O
> V
CC
)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, I
O
(V
O
= 0 to V
CC
)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, T
A
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
–0.5 V to 6 V
–0.5 V to V
CC
+ 0.5 V
–0.5 V to V
CC
+ 0.5 V
±
20 mA
±
20 mA
±
20 mA
0
°
C to 70
°
C
–65
°
C to 150
°
C
260
°
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: All voltage values are with respect to GND.
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