TMS320AV220
VIDEO CD MPEG DECODER
SCSS016A – JUNE 1994 – REVISED JANUARY 1996
10
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
still-mode operation (continued)
To advance to the next frame, the host sets bit 0 of the STILL_MODE register to a 1. The ’AV220 then performs
the following:
Finds and displays the next I-frame
Clears bit 0 of the STILL_MODE register
Enters the pause mode
Repeat the sequence as required. To terminate still mode, the host clears bit 1 of the STILL_MODE register.
’AV220 control registers
The ’AV220 is controlled by the host microprocessor by accessing 14 control registers listed in the following
table. The registers are initialized to the default values when the ’AV220 is reset.
REGISTER NAME
ADDRESS
(HEX)
LENGTH
(BITS)
DESCRIPTION
DEFAULT
VALUE (HEX)
ACCESS
MODE
AUD_STRM_ID
2429
5
Selects the audio-stream ID to decode
0
W/R
DISPLAY_MODE
2423
2
Controls video- and audio-display modes
0
W/R
DMA_MODE
242C
5
Allows psuedo-DMA control of the ’AV220
0
W/R
DRAM_SEL
2428
6
DRAM partition select
0
W/R
FAST
2421
1
Selects fast-forward/fast-reverse mode
0
W/R
INTERRUPT
2425
7
Interrupt requests
0
R
INTR_EN
2426
7
Interrupt masks
0
W/R
RESET
2424
1
Software reset
0
W/R
STILL_MODE
2422
2
Controls still-picture display and advancement
0
W/R
STREAM_EN
2420
1
Enables direct data write to the 4-Mbit DRAM
0
W/R
SYNC_CTL
242B
8
Synchronization control
78
W/R
USERDATA [17:0]
2600-11
8 (each)
User data stored in RAM, byte addressable
N/A
R
VERSION
2427
8
Device version number
R
VID_STRM_ID
242A
4
Selects the video-stream ID to decode
0
W/R
AUD_STRM_ID, audio-stream ID select (2429h)
This register sets the audio-stream ID to decode. The MPEG-1 specification allows for 32 different audio stream
IDs, all of which are supported with the ’AV220. The default is audio-stream ID zero.
DISPLAY_MODE, 1:0, video- and audio-display modes (2423h)
Bit 0 : 0 = Normal operation
1 = Picture blank
Bit 1: 0 = Normal operation
1 = Audio mute
Data is consumed at the normal rate when muting and/or blanking.