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Serial bus interface control register 1
SBI0CR1
(0x0022)
7
6
5
4
3
2
1
0
Bit Symbol
BC
ACK
NOACK
SCK
Read/Write
R/W
After reset
0
Note 1: fcgck: Gear clock [Hz], fs: Low-frequency clock oscillation circuit clock
Note 2: Don't change the contents of the registers when the start condition is generated, the stop condition is generated or the
data transfer is in progress. Write data to the registers before the start condition is generated or during the period from
when an interrupt request is generated for stopping the data transfer until it is released.
Note 3: After a software reset is generated, all the bits of SBI0CR2 register except SBI0CR2<SBIM> and the SBI0CR1, I2C0AR
and SBI0SR2 registers are initialized.
Note 4: When the operation is switched to STOP, IDLE0 or SLOW mode, the SBI0CR2 register, except SBI0CR2<SBIM>, and
the SBI0CR1, I2C0AR and SBI0DBR registers are initialized.
Note 5: When fcgck is 4MHz, SCK should be not set to 0y000, 0y001 or 0y010 because it is not possible to satisfy the bus
specification of fast mode.
Serial bus interface control register 2
SBI0CR2
(0x0023)
7
6
5
4
3
2
1
0
Bit Symbol
MST
TRX
BB
PIN
SBIM
-
SWRST
Read/Write
W
R
W
After reset
0
1
0
Note 1: When SBI0CR2<SBIM> is "0", no value can be written to SBI0CR2 except SBI0CR2<SBIM>. Before writing values to
SBI0CR2, write "1" to SBI0CR2<SBIM> to activate the serial bus interface mode.
Note 2: Don't change the contents of the registers, except SBI0CR2<SWRST>, when the start condition is generated, the stop
condition is generated or the data transfer is in progress. Write data to the registers before the start condition is generated
or during the period from when an interrupt request is generated for stopping the data transfer until it is released.
Note 3: Make sure that the port is in a high state before switching the port mode to the serial bus interface mode. Make sure that
the bus is free before switching the serial bus interface mode to the port mode.
Note 4: SBI0CR2 is a write-only register, and must not be accessed by using a read-modify-write instruction, such as a bit oper-
ation.
Note 5: After a software reset is generated, all the bits of SBI0CR2 register except SBI0CR2<SBIM> and the SBI0CR1, I2C0AR
and SBI0SR2 registers are initialized.
Note 6: When the operation is switched to STOP, IDLE0 or SLOW mode, the SBI0CR2 register, except SBI0CR2<SBIM>, and
the SBI0CR1, I2C0AR and SBI0DBR registers are initialized.
Serial bus interface status register 2
SBI0SR2
(0x0023)
7
6
5
4
3
2
1
0
Bit Symbol
MST
TRX
BB
PIN
AL
AAS
AD0
LRB
Read/Write
R
After reset
0
1
0
*
Note 1: * : Unstable
Note 2: When SBI0CR2<SBIM> becomes "0", SBI0SR is initialized.
Note 3: After a software reset is generated, all the bits of the SBI0CR2 register except SBI0CR2<SBIM> and the SBI0CR1, I2C0AR
and SBI0SR2 registers are initialized.
Note 4: When the operation is switched to STOP, IDLE0 or SLOW mode, the SBI0CR2 register, except SBI0CR2<SBIM>, and
the SBI0CR1, I2C0AR and SBI0DBR registers are initialized.
TMP89FH42
18. Serial Bus Interface (SBI)
18.3 Control
Page 280
RA002