參數(shù)資料
型號(hào)： SYM53C876
廠商： LSI Corporation
英文描述： PCI-Dual Channel SCSI Multi-Function Controller(PCI 雙通道SCSI多功能控制器)
中文描述： 的PCI -雙通道SCSI多功能控制器（雙通道的PCI的SCSI多功能控制器）
文件頁(yè)數(shù)： 61/285頁(yè)
文件大?。?/td> 3341K
代理商： SYM53C876
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SYM53C876/876E Data Manual
2-27
Functional Description
SCSI Functional Description
cleared when the “married” word is sent. The
flag is alternately cleared through SCRIPTS
or by the microprocessor. Also, the micropro-
cessor or SCRIPTS can use this bit for error
detection and recovery purposes.
Wide SCSI Receive Bit
The WSR bit is set whenever the SCSI con-
troller is receiving data (Data-In for initiator
or Data-Out for target) and the controller
detects a partial transfer at the end of a block
move or chained block move SCRIPTS
instruction. When WSR is set, the high order
byte of the last SCSI bus transfer is not trans-
ferred to memory. Instead, the byte is tempo-
rarily stored in the SWIDE register. The
hardware uses the WSR bit to determine what
behavior must occur at the start of the next
data receive transfer. The bit is automatically
cleared at the start of the next data receive
transfer. The bit can alternatively be cleared
by the microprocessor or through SCRIPTS.
Also, the microprocessor or SCRIPTS can use
this bit for error detection and recovery pur-
poses.
SWIDE Register
This register is used to store data for partial
byte data transfers. For receive data, the
SWIDE register holds the high-order byte of a
partial SCSI transfer that has not yet been
transferred to memory. This stored data may
be a residue byte (and therefore ignored) or it
may be valid data that is transferred to mem-
ory at the beginning of the next Block Move
instruction.
SODL Register
For send data, the low-order byte of the
SODL register holds the low-order byte of a
partial memory transfer which has not yet
been transferred across the SCSI bus. This
stored data is usually “married” with the first
byte of the next data send transfer, and both
bytes are sent across the SCSI bus at the start
of the next data send block move command.
Chained Block Move SCRIPTS
Instruction
A chained Block Move SCRIPTS instruction
primarily transfers consecutive data send or
data receive blocks. Using the chained block
move instruction facilitates partial receive
transfers and allows correct partial send
behavior without additional op code overhead.
Behavior of the chained Block Move instruc-
tion varies slightly for sending and receiving
data.
For receive data (Data-In for initiator or Data-
Out for target), a chained Block Move instruc-
tion indicates that if a partial transfer occurred
at the end of the instruction, the WSR flag is
set.The high order byte of the last SCSI trans-
fer is stored in the SWIDE register rather than
transferred to memory. The contents of the
SWIDE register should be the first byte trans-
ferred to memory at the start of the chained
block move data stream. Since the byte count
always represents data transfers to/from mem-
ory (as opposed to the SCSI bus), the byte
transferred out of the SWIDE register is one
of the bytes in the byte count. If the WSR bit
is clear when a receive data chained Block
Move instruction is executed, the data transfer
occurs similar to that of the regular block
move instruction. Whether the WSR bit is set
or clear, when a normal block move instruc-
tion is executed, the contents of the SWIDE
register is ignored and the transfer takes place
normally. For “N” consecutive wide data
receive Block Move instructions, the 2nd
through the Nth Block Move instructions
should be chained block moves.
For send data (Data-Out for initiator or Data-
In for target), a chained Block Move instruc-
tion indicates that if a partial transfer termi-
nates the chained block move instruction, the
last low-order byte (the partial memory trans-
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