參數資料
型號: ST623X-DBE
廠商: 意法半導體
英文描述: D/A Converter (D-A) IC; Resolution (Bits):24; Update Rate:192kSPS; No. of DACs:6; Data Interface:Serial; Package/Case:48-LQFP; Leaded Process Compatible:No; No. of Bits:24; No. of Channels:6; Operating Temp. Max:85 C RoHS Compliant: Yes
中文描述: 實時仿真開發(fā)工具,ST6單片機系列
文件頁數: 47/86頁
文件大?。?/td> 531K
代理商: ST623X-DBE
47/86
ST62T30B ST62E30B
5.2 ARTIMER 16
The ARTIMER16 is a timer module based on a 16
bit downcounter with Reload, Capture and Com-
pare features to manage timing requirements. Two
outputs provide PWM and Overflow (OVF) output
signals each with programmable polarity, and two
inputs CP1 and CP2 control start-up, capture
and/or reload operations on the central counter.
The ARTIMER16 includes four 16-bit registers
CMP,RLCP,MASK and CP for the Reload, Cap-
ture and compare functions, four 8-bit status/con-
trol registers and the associated control logic.The
16-bit registers are accessed from the 8-bit inter-
nal bus. The full 16-bit word is written in two bytes,
the high byte first and then the low byte. The high
byte is stored in an intermediate register and is
written to the target 16-bit register at the same
time as the write to the low byte. This high byte will
remain constant if further writes are made to the
low bytes, until the high byte is changed. Full
Read/Write access is available to all registers ex-
cept where mentioned.
The ARTIMER16 may be placed into the reset
mode by resetting RUNRES to 0 in order to
achieve lower consumption. The contents of
RLCP, CP, MASK and CMP are not affected, nor
is the previous run mode of the timer changed. If
RUNRES is subsequently set to 1, the timer re-
starts in the same RUN mode as previously set if
no changes are made to the timer status registers.
Finally, interrupt capabilities are associated to the
Reload, Capture and Compare features.
Figure 26. ARTIMER16 Block Diagram
5.2.1 CENTRAL COUNTER
The core of the 16 bit Auto-Reload Timer is a 16-
bit synchronous downcounter which accepts the
MCU internal clock through a prescaler with a pro-
grammable ratio (1/1, 1/4, 1/16).
SCR1
SCR2
SCR3
SCR4
B
8
1
8
8
8
4
8
16
16
16
CMP
MASK
RLCP
CP
16
16
COUNTER
CONTROL LOGIC
Compare-to-0
Compare
PSC
f
INT
PWM
OVF
CP1
CP2
INT
16-Bit
16-Bit
16-Bit
16-Bit
VR02014
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