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參數(shù)資料
| 型號： | ST623X-DBE |
| 廠商： | 意法半導體 |
| 英文描述： | D/A Converter (D-A) IC; Resolution (Bits):24; Update Rate:192kSPS; No. of DACs:6; Data Interface:Serial; Package/Case:48-LQFP; Leaded Process Compatible:No; No. of Bits:24; No. of Channels:6; Operating Temp. Max:85 C RoHS Compliant: Yes |
| 中文描述： | 實時仿真開發(fā)工具，ST6單片機系列 |
| 文件頁數(shù)： | 11/86頁 |
| 文件大小： | 531K |
| 代理商： | ST623X-DBE |
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11/86
ST62T30B ST62E30B
MEMORY MAP
(Cont’d)
1.3.5 Data Window Register (DWR)
TheDataread-only memorywindowislocatedfrom
address 0040h to address 007Fh in Data space. It
allows directreading of64 consecutive bytes locat-
ed anywhere in program memory, between ad-
dress 0000h and 1FFFh (top memory address de-
pends on the specific device). All the program
memory can therefore be used to store either in-
structions or read-only data. Indeed, the window
can be moved in steps of 64 bytes along the pro-
gram memoryby writing theappropriatecode in the
Data Window Register (DWR).
The DWR can beaddressed like any RAM location
in the Data Space,it is however a write-only regis-
ter andtherefore cannot be accessed using single-
bit operations. This register is used to position the
64-byte read-only data window (from address 40h
to address 7Fh of the Data space) in program
memory in 64-byte steps. The effective address of
the byte to be read as data in program memory is
obtained by concatenating the 6 least significant
bits of the register address given in the instruction
(as least significant bits) and the content of the
DWR register (asmost significant bits), as illustrat-
ed in Figure 5 below. For instance, when address-
ing location 0040h of the Data Space, with 0 load-
ed in the DWR register, the physical location ad-
dressed inprogram memory is 00h. The DWR reg-
ister is not cleared on reset, therefore it must be
written to prior to the first access to the Data read-
only memory window area.
Data Window Register (DWR)
Address: 0C9h
—
Write Only
Bits 7 = Not used.
Bit 6-0 =
DWR5-DWR0:
Data read-only memory
Window Register Bits. These are the Data read-
only memory Window bits that correspond to the
upper bits of the data read-only memory space.
Caution:
This register is undefined on reset. Nei-
ther read nor single bit instructions may be used to
address this register.
Note:
Care is required when handling the DWR
register as it is write only. For this reason, the
DWR contents should not be changed while exe-
cuting an interrupt service routine, as the service
routine cannot saveand then restore the register’s
previous contents. If it is impossible to avoid writ-
ing to the DWR during the interruptservice routine,
an image of the register must be saved in a RAM
location, and each time the program writes to the
DWR, it must also write to the image register. The
image register must be written first so that, if an in-
terrupt occurs between the two instructions, the
DWR is not affected.
Figure 5. Data read-only memory Window Memory Addressing
7
0
-
DWR6 DWR5 DWR4 DWR3 DWR2 DWR1 DWR0
DATA ROM
WINDOW REGISTER
CONTENTS
(DWR)
DATA SPACE ADDRESS
40h-7Fh
IN INSTRUCTION
PROGRAM SPACE ADDRESS
READ
7
6
5
4
3
2
0
5
4
3
2
1
0
5
4
3
2
1
0
1
6
7
8
9
10
11
0
1
VR0A1573
12
1
0
DATA SPACE ADDRESS
59h
0
0
0
0
0
1
0
0
1
1
1
Example:
DWR=28h
1
1
0
0
0
0
0
0
0
0
1
ROM
ADDRESS:A19h
1
1
13
0
1
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