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參數(shù)資料
| 型號(hào)： | SM34020AHTM32 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 圖形處理器 |
| 英文描述： | GRAPHICS PROCESSOR, CQFP132 |
| 封裝： | CERAMIC, QFP-132 |
| 文件頁數(shù)： | 89/98頁 |
| 文件大?。?/td> | 1546K |
| 代理商： | SM34020AHTM32 |
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SMJ34020A
GRAPHICS SYSTEM PROCESSOR
SGUS011D -- APRIL 1991 -- REVISED SEPTEMBER 2004
9
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251--1443
functional block diagram
Register
HA5--HA31
HBS0--HBS3
HCS
HREAD
HWRITE
HINT
HRDY
HDST
HOE
GI
R0
R1
EMU0
EMU1
EMU2
EMU3
CLKIN
LCLK1
LCLK2
RESET,LINT1,
LINT2
LAD0--LAD31
RCA0--RCA12
DDIN
DDOUT
RAS
CAS0--CAS3
WE
TR/QE
ALTCH
SF
PGMD
SIZE16
LRDY
BUSFLT
CAMD
VSYNC
HSYNC
CSYNC/HBLNK
CBLNK/VBLNK
VCLK
SCLK
27
4
32
13
Host
Address
Latch
Host
Interface
Multi-
Processor
Interface
Emulation
Interface
System
Clocks
Buffer/
MUX
Bus
DRAM/
VRAM
Interface
Bus
Interface
Video
Timing
and
Control
Local
Memory
and
Bus
Timing
I/O
LRU
Regs
ALU
Barrel
Shifter
Microcontrol ROM
Reset and Interrupts
Control
Page-mode
Register
Cache
PC
ST
SP
Decode
4
Register
File A
Register
File B
architecture (continued)
register files
Boolean, arithmetic, pixel-processing, byte, and field-move instructions operate on data within the
general-purpose register files. The SMJ34020A contains two register files of fifteen 32-bit registers and a
system stack pointer (SP). The SP is addressed in both register file A and register file B as a sixteenth register.
Transfers between registers and memory are facilitated using a complete set of field move instructions with
selectable field sizes.
The 15 general-purpose registers in register file A are used for high-level language support and
assembly-language programming. The 15 registers in register file B are dedicated to special functions during
PIXBLTS and other pixel operations but can be used as general-purpose registers at other times.
stack pointer (SP)
The stack pointer is a dedicated 32-bit internal register that points to the top of the system stack.
program counter (PC)
The SMJ34020A’s 32-bit program counter register points to the next instruction-stream word to be fetched.
Since instruction words are aligned to 16-bit boundaries, the four LSBs of the PC are always zero.
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