參數(shù)資料
型號： SM320F2812HFGM
廠商： TEXAS INSTRUMENTS INC
元件分類： 數(shù)字信號處理
英文描述： 16-BIT, 150 MHz, OTHER DSP, CQFP172
封裝： NCTB, CERAMIC, QFP-172
文件頁數(shù)： 36/147頁
文件大?。?/td> 1721K
代理商： SM320F2812HFGM
Electrical Specifications
129
December 2004
SGUS053
6.29.2
ADC Electrical Characteristics Over Recommended Operating Conditions
Table 639. DC Specifications (See Note 1)
PARAMETER
MIN
TYP
MAX
UNIT
Resolution
12
Bits
ADC clock (See Note 2)
1
kHz
ADC clock (See Note 2)
25
MHz
ACCURACY
INL (Integral nonlinearity) (See Note 3)
118.75 MHz ADC clock
±1.5
LSB
DNL (Differential nonlinearity) (See Note 3)
118.75 MHz ADC clock
±1
LSB
Offset error (See Note 4)
80
LSB
Overall gain error with internal reference
(See Note 5)
200
LSB
Overall gain error with external reference
(See Note 6)
If ADCREFPADCREFM = 1 V
±0.1%
50
LSB
Channel-to-channel offset variation
±8
LSB
Channel-to-channel Gain variation
±8
LSB
ANALOG INPUT
Analog input voltage (ADCINx to ADCLO)
(See Note 7)
0
3
V
ADCLO
5
0
5
mV
Input capacitance
10
pF
Input leakage current
3
±5
A
INTERNAL VOLTAGE REFERENCE
(See Note 5)
Accuracy, ADCVREFP
1.9
2
2.1
V
Accuracy, ADCVREFM
0.95
1
1.05
V
Voltage difference, ADCREFP ADCREFM
1
V
Temperature coefficient
50
PPM/
°C
Reference noise
100
V
EXTERNAL VOLTAGE REFERENCE (See Note 6)
Accuracy, ADCVREFP
1.9
2
2.1
V
Accuracy, ADCVREFM
0.95
1
1.05
V
Input voltage difference,
ADCREFP ADCREFM
0.99
1
1.01
V
NOTES:
1. Tested at 12.5-MHz ADCCLK
2. If SYSCLKOUT
≤ 25 MHz, ADC clock ≤ SYSCLKOUT/2
3. The INL degrades for frequencies beyond 18.75 MHz 25 MHz. Applications that require these sampling rates should use a
20K-resistor as bias resistor on the ADCRESEXT pin. This improves overall linearity and typical current drawn by the ADC will
be a few mA more than 24.9 k
bias.
4. 1 LSB has the weighted value of 3.0/4096 = 0.732 mV.
5. A single internal band gap reference (
±5% accuracy) sources both ADCREFP and ADCREFM signals, and hence, these voltages
track together. The ADC converter uses the difference between these two as its reference. The total gain error will be the
combination of the gain error shown here and the voltage reference accuracy (ADCREFP ADCREFM). A software-based
calibration procedure is recommended for better accuracy. See F2812 ADC Calibration Application Note (literature number
SPRA989) and Section 5.2, Documentation Support, for relevant documents.
6. In this mode, the accuracy of external reference is critical for overall gain. The voltage difference (ADCREFPADCREFM) will
determine the overall accuracy.
7. Voltages above VDDA + 0.3 V or below VSS 0.3 V applied to an analog input pin may temporarily affect the conversion of another
pin. To avoid this, the analog inputs should be kept within these limits.
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