- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄98083 > SM320F2812HFGM (TEXAS INSTRUMENTS INC) 16-BIT, 150 MHz, OTHER DSP, CQFP172 PDF資料下載
參數(shù)資料
| 型號： | SM320F2812HFGM |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | 16-BIT, 150 MHz, OTHER DSP, CQFP172 |
| 封裝： | NCTB, CERAMIC, QFP-172 |
| 文件頁數(shù)： | 101/147頁 |
| 文件大?。?/td> | 1721K |
| 代理商： | SM320F2812HFGM |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁當(dāng)前第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁第147頁
Peripherals
57
December 2004
SGUS053
4.2.9
External ADC Start-of-Conversion
EVA/EVB start-of-conversion (SOC) can be sent to an external pin (EVASOC/EVBSOC) for external ADC
interface. EVASOC and EVBSOC are MUXed with T2CTRIP and T4CTRIP, respectively.
4.3
Enhanced Analog-to-Digital Converter (ADC) Module
A simplified functional block diagram of the ADC module is shown in Figure 44. The ADC module consists
of a 12-bit ADC with a built-in sample-and-hold (S / H) circuit. Functions of the ADC module include:
12-bit ADC core with built-in S/H
Analog input: 0.0 V to 3.0 V (Voltages above 3.0 V produce full-scale conversion results.)
Fast conversion rate: 80 ns at 25-MHz ADC clock, 12.5 MSPS
16-channel, MUXed inputs
Autosequencing capability provides up to 16 “autoconversions” in a single session. Each conversion can
be programmed to select any 1 of 16 input channels
Sequencer can be operated as two independent 8-state sequencers or as one large 16-state sequencer
(i.e., two cascaded 8-state sequencers)
Sixteen result registers (individually addressable) to store conversion values
The digital value of the input analog voltage is derived by:
when input
≤ 0 V
Digital Value
+ 0,
Digital Value
+ 4095
Input Analog Voltage
* ADCLO
3
Digital Value
+ 4096
Input Analog Voltage
* ADCLO
3
,
when 0 V
< input < 3 V
Digital Value
+ 4095,
when input
≥ 3 V
Multiple triggers as sources for the start-of-conversion (SOC) sequence
S/W software immediate start
EVA Event manager A (multiple event sources within EVA)
EVB Event manager B (multiple event sources within EVB)
Flexible interrupt control allows interrupt request on every end-of-sequence (EOS) or every other EOS
Sequencer can operate in “start/stop” mode, allowing multiple “time-sequenced triggers” to synchronize
conversions
EVA and EVB triggers can operate independently in dual-sequencer mode
Sample-and-hold (S/H) acquisition time window has separate prescale control
The ADC module in the F2812 has been enhanced to provide flexible interface to event managers A and B.
The ADC interface is built around a fast, 12-bit ADC module with a fast conversion rate of 80 ns at 25-MHz
ADC clock. The ADC module has 16 channels, configurable as two independent 8-channel modules to service
event managers A and B. The two independent 8-channel modules can be cascaded to form a 16-channel
module. Although there are multiple input channels and two sequencers, there is only one converter in the
ADC module. Figure 44 shows the block diagram of the F2812 ADC module.
The two 8-channel modules have the capability to autosequence a series of conversions, each module has
the choice of selecting any one of the respective eight channels available through an analog MUX. In the
cascaded mode, the autosequencer functions as a single 16-channel sequencer. On each sequencer, once
the conversion is complete, the selected channel value is stored in its respective RESULT register.
Autosequencing allows the system to convert the same channel multiple times, allowing the user to perform
oversampling algorithms. This gives increased resolution over traditional single-sampled conversion results.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SM320MCM41DHFHM40 | 32-BIT, 40 MHz, OTHER DSP, CQFP352 |
| SM320MCM42CHFNM40 | 32-BIT, 40 MHz, OTHER DSP, CQFP408 |
| SM320VC33HFGM150 | 32-BIT, 75 MHz, OTHER DSP, CQFP164 |
| SM34020AHTM32 | GRAPHICS PROCESSOR, CQFP132 |
| SM563 | 4-BIT, MROM, MICROCONTROLLER, PQFP64 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SM320F2812HFGM150 | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC Military DSP RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
| SM320F2812HFGS150 | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC HT Dig Signal Controller RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
| SM320F2812-HT | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Digital Signal Processor |
| SM320F2812KGDS150A | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC HT Dig Signal Controller RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
| SM320F2812PGFMEP | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC EP Digital Signal Proc RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。