參數(shù)資料
型號(hào)： SM320F2812HFGM
廠商： TEXAS INSTRUMENTS INC
元件分類： 數(shù)字信號(hào)處理
英文描述： 16-BIT, 150 MHz, OTHER DSP, CQFP172
封裝： NCTB, CERAMIC, QFP-172
文件頁數(shù)： 131/147頁
文件大?。?/td> 1721K
代理商： SM320F2812HFGM
Electrical Specifications
84
December 2004
SGUS053
6.2
Recommended Operating Conditions
MIN
NOM
MAX
UNIT
VDDIO
Device supply voltage, I/O
3.14
3.3
3.47
V
VDD , VDD1
Device supply voltage, CPU
1.8 V (135 MHz)
1.71
1.8
1.89
V
VDD , VDD1
Device supply voltage, CPU
1.9 V (150 MHz)
1.81
1.9
2
V
VSS
Supply ground
0
V
VDDA1 , VDDA2 ,
AVDDREFBG, VDDAIO
ADC supply voltage
3.14
3.3
3.47
V
VDD3VFL
Flash programming supply voltage
3.14
3.3
3.47
V
fSYSCLKOUT
Device clock frequency
VDD = 1.9 V ± 5%
2
150
MHz
fSYSCLKOUT
Device clock frequency
(system clock)
VDD = 1.8 V ± 5%
2
135
MHz
All inputs except XCLKIN
2
VDDIO
VIH
High-level input voltage
All inputs except XCLKIN
2
VDDIO
V
VIH
High-level input voltage
XCLKIN (@ 50
A max)
0.7VDD
VDD
V
VIL
Low-level input voltage
All inputs except XCLKIN
0.8
V
VIL
Low-level input voltage
XCLKIN (@ 50
A max)
0.3VDD
V
IOH
High-level output source current,
All I/Os except Group 2
4
mA
IOH
High-level output source current,
VOH = 2.4 V
Group 2
8
mA
IOL
Low-level output sink current,
All I/Os except Group 2
4
mA
IOL
Low-level output sink current,
VOL = VOL MAX
Group 2
8
mA
TA
Ambient
temperature
M version
55
125
°C
See Section 6.7 for power sequencing of VDDIO, VDDAIO, VDD, VDDA1/VDDA2/AVDDREFBG, and VDD3VFL.
Group 2 pins are as follows: XINTF pins, PDPINTA, TDO, XCLKOUT, XF, EMU0, and EMU1.
In Revision C, EVA (GPIOA0GPIOA15) and GPIOD0 are 4 mA drive.
§ Replaced by Q temperature option from silicon revision E onwards
6.3
Electrical Characteristics Over Recommended Operating Conditions
(Unless Otherwise Noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VOH
High-level output voltage
IOH = IOHMAX
2.4
V
VOH
High-level output voltage
IOH = 50 A
VDDIO 0.2
V
VOL
Low-level output voltage
IOL = IOLMAX
0.4
V
VOL
Low-level output voltage
IOL = IOLMAX
0.4
V
IIL
Input
current
With pullup
VDDIO = 3.3 V,
VIN = 0 V
All I/Os (including XRS)
except EVB
80
140
190
A
IIL
Input
current
(low level)
With pullup
DDIO
VIN = 0 V
GPIOB/EVB
13
25
35
A
(low level)
With pulldown
VDDIO = 3.3 V, VIN = 0 V
±2
Input
current
With pullup
VDDIO = 3.3 V, VIN = VDD
±2
IIH
Input
current
(high level)
With pulldown
VDDIO = 3.3 V,
28
50
80
A
IIH
current
(high level)
With pulldown
VDDIO = 3.3 V,
VIN = VDD
28
50
80
A
IOZ
Output current,
high-impedance state
(off-state)
VO = VDDIO or 0 V
±2
A
Ci
Input capacitance
7
pF
Co
Output capacitance
7
pF
The following pins have no internal PU/PD: GPIOE0, GPIOE1, GPIOF0, GPIOF1, GPIOF2, GPIOF3, GPIOF12, GPIOG4, and GPIOG5.
The following pins have an internal pulldown: XMP/MC, TESTSEL, and TRST.
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