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參數(shù)資料
| 型號： | SI3200-BS |
| 廠商： | Silicon Laboratories Inc |
| 文件頁數(shù)： | 62/128頁 |
| 文件大小： | 0K |
| 描述： | IC LINEFEED INTRFC 100V 16SOIC |
| 標(biāo)準(zhǔn)包裝： | 48 |
| 系列： | ProSLIC® |
| 功能： | 用戶線路接口概念（SLIC），CODEC |
| 接口： | GCI，PCM，SPI |
| 電路數(shù)： | 2 |
| 電源電壓： | 3.3V，5V |
| 電流 - 電源： | 110µA |
| 功率（瓦特）： | 941mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.154"，3.90mm Width）裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 16-SOIC N |
| 包裝： | 管件 |
| 包括： | 電池切換，BORSCHT 功能，DTMF 生成和解碼，F(xiàn)SK 音調(diào)生成，調(diào)制解調(diào)器和傳真音調(diào)檢測 |
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Si3232
Preliminary Rev. 0.96
39
Not
Recommended
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esi
gn
s
In addition to the variable frequency and amplitude,
there is a selectable dc offset (VOFF) that can be added
to the waveform. The dc offset is defined in the RINGOF
RAM location. The ringing generator has two timers
which allow on/off cadence settings up to 8 s on/8 s off.
In addition to controlling ringing cadence, these timers
control the transition into and out of the ringing state.
To
initiate
ringing,
the
user
must
program
the
RINGFREQ,
RINGAMP,
and
RINGPHAS
RAM
addresses as well as the RINGTA, and RINGTI
registers, and select the ringing waveshape and dc
offset. Once this is done, the TAEN and TIEN bits are
set as desired. Ringing state is invoked by a write to the
linefeed register. At the expiration of RINGTA, the
Si3232 turns off the ringing waveform and goes to the
on-hook transmission state. At the expiration of RINGTI,
ringing is initiated again. This process continues as long
as the two timers are enabled and the linefeed register
remains in the ringing state.
4.6.2. Internal Trapezoidal Ringing
In
addition
to
the
traditional
sinusoidal
ringing
waveform, the Si3232 can generate a trapezoidal
ringing waveform similar to the one illustrated in
The
RINGFREQ,
RINGAMP,
and
RINGPHAS RAM locations are used for programming
the ringing wave shape as follows:
RINGPHAS = 4 x Period x 8000
RINGAMP = (Desired V/160.8 V) x (215)
RINGFREQ = (2 x RINGAMP) / (tRISE x 8000)
RINGFREQ is a value that is added or subtracted from
the waveform to ramp the signal up or down in a linear
fashion. This value is a function of rise time, period, and
amplitude, where rise time and period are related
through the following equation for the crest factor of a
trapezoidal waveform.
where
So, for a 90 VPK, 20 Hz trapezoidal waveform with a
crest factor of 1.3, the period is 0.05 s, and the rise time
requirement is 0.015 s.
RINGPHAS = 4 x 0.05 x 8000 = 1600 (0x0640)
RINGAMP = 90/160.8 x (215) = 18340 (0x47A5)
RINGFREQ = (2 x RINGAMP) (0.0153 x 8000) =
300 (0x012C)
The time registers and interrupts described in the
sinusoidal ring description also apply to the trapezoidal
ring waveform.
4.7. Internal Unbalanced Ringing
The Si3232 also provides the ability to generate a
traditional battery-backed unbalanced ringing waveform
for ringing terminating devices that require a high dc
content or for use in ground-start systems that cannot
tolerate a ringing waveform on both the TIP and RING
leads. The unbalanced ringing scheme applies the
ringing signal to the RING lead; the TIP lead remains at
the programmed VCM voltage that is very close to
ground. A programmable dc offset can be preset to
provide dc current for ring trip detection. Figure 18
illustrates the internal unbalanced ringing waveform.
Figure 18. Internal Unbalanced Ringing
To enable unbalanced ringing, set the RINGUNB bit of
the RINGCON register. As is the case with internal
balanced ringing, the unbalanced ringing waveform is
generated by using the on-chip ringing tone generator.
The tone generator used to generate ringing tones is a
two-pole resonator with programmable frequency and
amplitude. Since ringing frequencies are low compared
to the audio band signaling frequencies, the ringing
waveform is generated at a 1 kHz rate.
The ringing generator is programmed via the RINGAMP,
RINGFREQ, and RINGPHAS registers. The RINGOF
register is used to set the dc offset position around
RINGAMP
1
4
---
.00789
1.99211
---------------------
2
15
85
160.173
---------------------
273
0x111
=
t
RISE
3
4
---T1
1
CF
2
-----------
–
=
TPeriod
1
f
RING
--------------
CF
desired crest factor
=
==
RING
TIP
VRING
Si3232
DC Offset
GND
VTIP
VRING
VBATR
-80V
VOVRING
V
CM
DC Offset
VOFF
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SI3200-BSR | 制造商:Silicon Laboratories Inc 功能描述: |
| SI3200-FS | 功能描述:電信線路管理 IC 100 V Linefeed Interface IC unit RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray |
| SI3200-FSR | 制造商:Silicon Laboratories Inc 功能描述:SLIC 2CH 70DB 45MA 3.3V/5V 16SOIC EP - Tape and Reel |
| Si3200-G-FS | 功能描述:射頻無線雜項 100 V Linefeed Inter IC unit price RoHS:否 制造商:Texas Instruments 工作頻率:112 kHz to 205 kHz 電源電壓-最大:3.6 V 電源電壓-最小:3 V 電源電流:8 mA 最大功率耗散: 工作溫度范圍:- 40 C to + 110 C 封裝 / 箱體:VQFN-48 封裝:Reel |
| SI3200-G-FSR | 功能描述:電信線路管理 IC 100 V Linefeed Interface RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray |
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