Figure 9. VRING vs" />
參數(shù)資料
型號： SI3200-BS
廠商： Silicon Laboratories Inc
文件頁數(shù)： 46/128頁
文件大?。?/td> 0K
描述： IC LINEFEED INTRFC 100V 16SOIC
標準包裝： 48
系列： ProSLIC®
功能： 用戶線路接口概念（SLIC），CODEC
接口： GCI，PCM，SPI
電路數(shù)： 2
電源電壓： 3.3V，5V
電流 - 電源： 110µA
功率（瓦特）： 941mW
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 16-SOIC（0.154"，3.90mm Width）裸露焊盤
供應商設備封裝： 16-SOIC N
包裝： 管件
包括： 電池切換，BORSCHT 功能，DTMF 生成和解碼，F(xiàn)SK 音調生成，調制解調器和傳真音調檢測
Si3232
24
Preliminary Rev. 0.96
Not
Recommended
fo
r N
ew
D
esi
gn
s
Figure 9. VRING vs. IRING Characteristic for
Ground Start Operation
Figure 8 illustrates the linefeed characteristics for a
typical application using an ILOOP setting of 24 mA and
a TIP-RING open circuit voltage (VOC) of 48 V. The
VOC and VOCTRACK RAM locations are used to
program the TIP-RING voltage, and these two values
are equal provided that VBAT > VOC + VOV + VCM. When
the battery voltage drops below that point, VOCTRACK
decreases at the same rate as VBAT in order to provide
sufficient headroom to accommodate both VOV and VCM
levels below VBAT.
The equation for calculating the RAM address value for
VOC, VCM, VOCDELTA, VOV, VOVRING, RINGOF,
VOCLTH, and VOCHTH is shown below. The CEILING
function rounds up the result to the next integer.
For example, to program a VOC value of 51 V:
During the on-hook state, the Si3232 is in the constant-
voltage operating area and typically presents a 640
output impedance (Figure 8). The Si3232 includes a
special modified linefeed scheme that adjusts the
ProSLIC’s output impedance based on the linefeed
voltage level in order to ensure the ability to source
extended loop lengths. When the terminal equipment
transitions to the off-hook state, the linefeed voltage
typically collapses and transitions through the preset
threshold voltage causing the Si3232 to reduce its
output impedance to 320
. The TIP-RING voltage will
then continue decreasing until the preset loop current
limit (ILIM) setting is reached. Loop closure and ring trip
detection thresholds are programmable, and internal
debouncing is provided. A high-gain common-mode
loop generates a low impedance from TIP or RING to
ground, effectively reducing the effects of longitudinal
interference.
For ground-start operation, the active lead presents a
640
output impedance during the on-hook state and a
320
output impedance in the off-hook state. The
“open” lead presents a high-impedance feed (>150 k
).
Figure 9 illustrates a typical ground-start application
using VOC = 48 V and ILIM = 24 mA in the TIP OPEN
state.
The
ring
ground-detection
threshold
and
debouncing interval are both programmable.
Figure 10. VTIP–RING vs. ILOOP Characteristics
using Modified Linefeed Scheme
The modified linefeed scheme also allows the user to
modify the apparent VOC voltage as a means of
boosting the linefeed voltage when the battery voltage
drops below a certain level. Figure 10 illustrates a
typical Si3232 application sourcing a loop from a 48 V
battery.
For
VOV and VCM values of 3 V, the
VOCTRACK RAM location will be set to 42 V when
given a programmed value of 42 V for the VOC RAM
location. When a loop closure event occurs, the TIP-
RING voltage decreases linearly until it reaches a
preset voltage threshold that is lower than VOCTRACK
by an amount programmed into the VOCLTH RAM
location. Exceeding this threshold causes the Dual
ProSLIC to increase its “target” VOC level by an amount
programmed into the VOCDELTA RAM location to
provide additional overhead for driving the higher-
impedance loop. In the on-hook condition, the TIP-
RING voltage increases linearly until it rises above a
second preprogrammed voltage threshold, which is
higher than VOCTRACK by an amount programmed
into the VOCHTH RAM location. This scheme offers the
ability to drive very long loop lengths while using the
lowest possible battery voltage. Consult the factory for
optimal register and RAM location settings for specific
applications.
0
–20
–40
–60
10
20
30
40
50
I
LIM = 24 mA
R
O = 600
I
RING (mA)
V
RI
N
G
(V
)
R
O = 320
Loop Closure
Threshold
RAM VALUE
2
CEILING ROUND
desired voltage
1.005V
----------------------------------------
512
5
----------
=
VOC
2
CEILING ROUND
51 V
1.005 V
--------------------
512
5
----------
28CEh
==
0
10
20
10
20
30
40
50
VTIP– RING (V)
ILIM (mA)
1930
load line
R
O = 320
R
O = 600
VOCTRACK
VOCDELTA
V
OC
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相關代理商/技術參數(shù)
參數(shù)描述
SI3200-BSR 制造商:Silicon Laboratories Inc 功能描述:
SI3200-FS 功能描述:電信線路管理 IC 100 V Linefeed Interface IC unit RoHS:否 制造商:STMicroelectronics 產品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray
SI3200-FSR 制造商:Silicon Laboratories Inc 功能描述:SLIC 2CH 70DB 45MA 3.3V/5V 16SOIC EP - Tape and Reel
Si3200-G-FS 功能描述:射頻無線雜項 100 V Linefeed Inter IC unit price RoHS:否 制造商:Texas Instruments 工作頻率:112 kHz to 205 kHz 電源電壓-最大:3.6 V 電源電壓-最小:3 V 電源電流:8 mA 最大功率耗散: 工作溫度范圍:- 40 C to + 110 C 封裝 / 箱體:VQFN-48 封裝:Reel
SI3200-G-FSR 功能描述:電信線路管理 IC 100 V Linefeed Interface RoHS:否 制造商:STMicroelectronics 產品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray
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