參數(shù)資料
型號(hào)： S1C621C0D
元件分類(lèi)： 微控制器/微處理器
英文描述： 4-BIT, MROM, 1.3 MHz, MICROCONTROLLER, UUC74
封裝： DIE-74
文件頁(yè)數(shù)： 83/108頁(yè)
文件大小： 992K
代理商： S1C621C0D
68
EPSON
S1C621C0 TECHNICAL MANUAL
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Interrupt and HALT)
4.12.1 Interrupt factor
Table 4.12.1.1 shows the factors for generating interrupt requests.
The interrupt flags are set to "1" depending on the corresponding interrupt factors.
The CPU operation is interrupted when any of the conditions below set an interrupt factor flag to "1".
The corresponding mask register is "1" (enabled)
The interrupt flag is "1" (EI)
The interrupt factor flag is a read-only register, but can be reset to "0" when the register data is read out.
At initial reset, the interrupt factor flags are reset to "0".
Table 4.12.1.1 Interrupt factors
Interrupt factor
Remote controller (set
τ cycle has passed)
R/F converter (R/F conversion has completed)
K10–K13 input (falling or rising edge)
K00–K03 input (falling or rising edge)
Clock timer 2 Hz (falling edge)
Clock timer 8 Hz (falling edge)
Clock timer 32 Hz (falling edge)
Interrupt factor flag
IREM
IRF
IK1
IK0
IT2
IT1
IT0
(F8HD0)
(F9HD0)
(FAHD0)
(FBHD0)
(FCHD2)
(FCHD1)
(FCHD0)
Note: Reading of interrupt factor flag is available at EI, but be careful in the following cases.
If the interrupt mask register value corresponding to the interrupt factor flags to be read is set to "1",
an interrupt request will be generated by the interrupt factor flag set timing, or an interrupt request
will not be generated.
4.12.2 Interrupt mask
The interrupt factor flags can be masked by the corresponding interrupt mask registers.
The interrupt mask registers are read/write registers. They are enabled (interrupt authorized) when "1" is
written to them, and masked (interrupt inhibited) when "0" is written to them.
At initial reset, the interrupt mask register is set to "0".
Table 4.12.2.1 shows the correspondence between interrupt mask registers and interrupt factor flags.
Table 4.12.2.1 Interrupt mask registers and interrupt factor flags
Interrupt mask register
Interrupt factor flag
IREM
IRF
IK1
IK0
IT2
IT1
IT0
(F8HD0)
(F9HD0)
(FAHD0)
(FBHD0)
(FCHD2)
(FCHD1)
(FCHD0)
EIREM
EIRF
EIK1
EIK0
EIT2
EIT1
EIT0
(F0HD0)
(F1HD0)
(F2HD0)
(F3HD0)
(F4HD2)
(F4HD1)
(F4HD0)
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