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參數(shù)資料
| 型號： | S1C621C0D |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, MROM, 1.3 MHz, MICROCONTROLLER, UUC74 |
| 封裝： | DIE-74 |
| 文件頁數(shù)： | 34/108頁 |
| 文件大小： | 992K |
| 代理商： | S1C621C0D |
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S1C621C0 TECHNICAL MANUAL
EPSON
23
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Output Ports)
At initial reset, the output terminals are set to low (VSS).
When an R0x is used as the special output port, fix the output port register R0x at "0" and turn the signal
ON or OFF using the special output enable register.
Note: Be sure that the output terminal is fixed at a high (VDD) level the same with the DC output if "1" is
written to the R0x register when the special output has been selected.
REMCR (R00) and REMDC (R01) outputs
REMCR (remote control carrier) signal generated by the built-in remote controller can be output from the
R00 terminal.
This output signal is used to drive the LED for an infrared remote controller so that the remote control
signal is transmitted.
Similarly, REMDC (DC) signal that has not yet done pulse modulation can be output from the R01 termi-
nal.
When R00 is used for REMCR output, keep R00 register set to "0". The signal output can be controlled
using the REMCR register. When the REMCR register is set to "1", the REM (remote controller) circuit goes
on and shifts to the status in which the REMCR signal can be output from the R00 terminal. When "0" is set,
the R00 terminal goes low level (VSS).
When R01 is used for REMDC output, keep the R01 register set to "0". The signal output can be controlled
using the REMDC register. When the REMDC register is set to "1", the REM (remote controller) circuit goes
on and shifts to the status in which the REMDC signal can be output from the R01 terminal. When "0" is set,
the R01 terminal goes low level (VSS).
See Section 4.9, "Remote Controller (REM)" for the output waveform and output timing.
FOUT (R02)
In order for the S1C621C0 to provide clock signal to an external device, FOUT signal can be output from
the R02 terminal.
When R02 is used for FOUT output, keep R02 register set to "0". ON/OFF of the signal output can be
controlled using the FOUT output enable register FOUTE.
When the FOUTE register is set to "1", FOUT signal is output from the R02 terminal. When "0" is set, the
R02 terminal goes low level (VSS).
The frequency of clock output signal may be selected from among 4 types as Table 4.5.3.2 by setting of the
FOFQ0 and FOFQ1 registers.
Table 4.5.3.2 FOUT clock frequency
FOFQ1
0
1
FOFQ0
0
1
0
1
Clock frequency (Hz)
512
4,096
fOSC1
fOSC3
fOSC1: OSC1 oscillation frequency
fOSC3: OSC3 oscillation frequency
Note: A hazard may occur when the FOUT signal is turned ON or OFF.
Figure 4.5.3.2 shows the output waveform of FOUT.
Fig. 4.5.3.2 Output waveform of FOUT
FOUTE register
FOUT output (R02)
01
R02 register
Fixed at 0
0
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