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參數(shù)資料
| 型號： | S1C621C0D |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, MROM, 1.3 MHz, MICROCONTROLLER, UUC74 |
| 封裝： | DIE-74 |
| 文件頁數(shù)： | 55/108頁 |
| 文件大?。?/td> | 992K |
| 代理商： | S1C621C0D |
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42
EPSON
S1C621C0 TECHNICAL MANUAL
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Remote Controller)
This remote controller supports the following two modes for controlling the modulation signal (carrier
ON/OFF).
Soft-timer mode (Software timer control mode)
Hard-timer mode (Hardware timer control mode)
In the soft-timer mode, the carrier ON/OFF timing and the time are controlled by the software. The
optional ON/OFF time can be set within the range that is controlled by the software.
In the hard-timer mode, the carrier ON/OFF timing and the time are controlled by the pulse modulation
circuit based on the reference cycle (
τ) that is generated by the τ (reference cycle) generation circuit dividing
the carrier. For the reference cycle (
τ), the carrier dividing ratio can be selected by the software from 4
types. The carrier ON time can be selected by the software from 16 types, 0 to 15 times as long as the
reference cycle (
τ). The ON/OFF time is limited to some extent in comparison with the soft-timer mode, but
the software's share is decreased because the interrupt can be used.
Features of the soft-timer mode and hard-timer mode are shown in Table 4.9.1.1.
Table 4.9.1.1 Features of soft-timer mode and hard-timer mode
Item
Processing of other routines during REM output
Reference cycle (
τ) sway
during REM transmission
Setting of REM output width
Relation between REM reference cycle
and modulation frequency cycle
Carrier waveform
Possible
Source oscillation sway only
Fixed to widths over ten
Stabilized at setting
Hard-timer mode
Difficult
Source oscillation sway and errors
caused by instruction cycles
Variable to any width
Variable
Duty slightly disturbed before and after ON time
Soft-timer mode
4.9.2 Remote controller ON/OFF and output control
The remote controller has two output terminals: the REMCR terminal that outputs the pulse-modulated
transmission waveform and the REMDC terminal that outputs the DC signal (PPM modulation signal) for
controlling the carrier ON/OFF. (The following sections explain these outputs as REMCR output and
REMDC output.) The REMCR and REMDC terminals are shared with the R00 and R01 output port termi-
nals, respectively. The output circuit is configured as shown in Figure 4.9.2.1. When using the remote
control outputs, fix the R00 and R01 registers at "0" and do not change them. (If the REMDC output is not
used, the R01 register and terminal can be used as an output port.)
At initial reset and while remote output stops, the REMCR and REMDC terminals is set to low level (VSS).
Data
bus
REMCR
REMCR (R00) output
Register
REMCR
Register
R00
REMDC
REMDC (R01) output
Register
REMDC
Register
R01
Fig. 4.9.2.1 Configuration of REMCR/R00 and REMDC/R01 output circuits
As shown in Figure 4.9.2.1, the REMCR output is enabled and shifts into outputable status by writing "1" to
the REMCR register (E0HD0). The REMDC output is enabled by writing "1" to the REMDC register
(E0HD1).
In addition, the REMCR and REMDC registers are designed to control the REM circuit ON/OFF. When "1"
is written to either one or both registers, the REM circuit goes ON and the signal output corresponding to
the register is started. When writing is done so that both registers are set to "0", the REM circuit goes OFF
and the REMCR and REMDC terminals go to low level (VSS). (when the R00 and R01 registers are fixed at
"0".)
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