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參數(shù)資料
| 型號： | RJ80530MY650256 |
| 元件分類： | 微處理器 |
| 英文描述： | MICROPROCESSOR|32-BIT|CMOS|BGA|479PIN|CERAMIC |
| 中文描述： | 微處理器| 32位|的CMOS | BGA封裝| 479PIN |陶瓷 |
| 文件頁數(shù)： | 4/89頁 |
| 文件大?。?/td> | 1672K |
| 代理商： | RJ80530MY650256 |
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Mobile Intel
Pentium
III Processor-M Datasheet
4
Datasheet
298340-002
3.7
AC Specifications................................................................................................. 35
3.7.1
System Bus, Clock, APIC, TAP, CMOS, and Open-drain AC
Specifications.......................................................................................... 35
System Signal Simulations ............................................................................................................ 50
4.1
System Bus Clock (BCLK) and PICCLK DC Specifications and AC Signal Quality
Specifications....................................................................................................... 50
4.2
AGTL AC Signal Quality Specifications............................................................... 52
4.3
Non-AGTL Signal Quality Specifications............................................................. 54
4.3.1
PWRGOOD, VTTPWRGD Signal Quality Specifications....................... 54
Mechanical Specifications.............................................................................................................. 55
5.1
Socketable Micro-FCPGA Package..................................................................... 55
5.2
Surface Mount Micro-FCBGA Package............................................................... 59
5.3
Signal Listings...................................................................................................... 63
V
CC
Thermal Specifications............................................................................................................ 70
6.1
Thermal Diode ..................................................................................................... 71
Processor Initialization and Configuration ..................................................................................... 73
7.1
Description........................................................................................................... 73
7.1.1
Quick Start Enable.................................................................................. 73
7.1.2
System Bus Frequency........................................................................... 73
7.1.3
APIC Enable ........................................................................................... 73
7.2
Clock Frequencies and Ratios............................................................................. 73
Processor Interface........................................................................................................................ 75
8.1
Alphabetical Signal Reference............................................................................. 75
8.2
Signal Summaries................................................................................................ 85
Appendix A. PLL RLC Filter Specification .................................................................................................. 87
A1.
Introduction ......................................................................................................... 87
A2.
Filter Specification............................................................................................... 87
A3.
Recommendation for Mobile Systems................................................................ 88
A4.
Comments........................................................................................................... 89
4.
5.
6.
7.
8.
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