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| 型號(hào)： | PPXY8300A6T1 |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | Pressure Sensor |
| 英文描述： | DIFFERENTIAL, PEIZORESISTIVE PRESSURE SENSOR, RECTANGULAR, SURFACE MOUNT |
| 封裝： | SOIC-20 |
| 文件頁(yè)數(shù)： | 31/162頁(yè) |
| 文件大小： | 4316K |
| 代理商： | PPXY8300A6T1 |
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MPXY8300 Series
Sensors
126
Freescale Semiconductor
SECTION 15 DEVELOPMENT SUPPORT
15.1
Introduction
This chapter describes the single-wire background debug mode (BDM), which uses the on-chip background debug controller
(BDC) module, and the independent on-chip real-time in-circuit emulation (ICE) system, which uses the on-chip debug (DBG)
module.
15.1.1
Features
Features of the BDC module include:
Single pin for mode selection and background communications
BDC registers are not located in the memory map
SYNC command to determine target communications rate
Non-intrusive commands for memory access
Active background mode commands for CPU register access
GO and TRACE1 commands
BACKGROUND command can wake CPU from stop or wait modes
One hardware address breakpoint built into BDC
Oscillator runs in stop mode, if BDC enabled
COP watchdog disabled while in active background mode
Features of the ICE system include:
Two trigger comparators: Two address + read/write (R/W) or one full address + data + R/W
Flexible 8-word by 16-bit FIFO (first-in, first-out) buffer for capture information:
–
Change-of-flow addresses or
–
Event-only data
Two types of breakpoints:
–
Tag breakpoints for instruction opcodes
–
Force breakpoints for any address access
Nine trigger modes:
–
Basic: A-only, A OR B
–
Sequence: A then B
–
Full: A AND B data, A AND NOT B data
–
Event (store data): Event-only B, A then event-only B
–
Range: Inside range (A
≤ address ≤ B), outside range (address < A or address > B)
15.2
Background Debug Controller (BDC)
All MCUs in the HCS08 Family contain a single-wire background debug interface that supports in-circuit programming of on-chip
nonvolatile memory and sophisticated non-intrusive debug capabilities. Unlike debug interfaces on earlier 8-bit MCUs, this
system does not interfere with normal application resources. It does not use any user memory or locations in the memory map
and does not share any on-chip peripherals.
BDC commands are divided into two groups:
Active background mode commands require that the target MCU is in active background mode (the user program is not
running). Active background mode commands allow the CPU registers to be read or written, and allow the user to trace
one user instruction at a time, or GO to the user program from active background mode.
Non-intrusive commands can be executed at any time even while the user’s program is running. Non-intrusive
commands allow a user to read or write MCU memory locations or access status and control registers within the
background debug controller.
Typically, a relatively simple interface pod is used to translate commands from a host computer into commands for the custom
serial interface to the single-wire background debug system. Depending on the development tool vendor, this interface pod may
use a standard RS-232 serial port, a parallel printer port, or some other type of communications such as a universal serial bus
(USB) to communicate between the host PC and the pod. The pod typically connects to the target system with ground, the BKGD
pin, RESET, and sometimes VDD. An open-drain connection to reset allows the host to force a target system reset, which is useful
to regain control of a lost target system or to control startup of a target system before the on-chip nonvolatile memory has been
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