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MFR4200 FlexRay Communication Controller
MFR4200 Data Sheet, Rev. 0
84
Freescale Semiconductor
3.2.3.3.25
Maximum Rate Correction Register (MRCR)
FlexRay Protocol Related Parameter – pRateCorrectionOut
Address 0xDC
Reset
undefined state
This register defines the maximum permitted absolute rate correction value, in microticks, to be applied
by the internal clock synchronization algorithms. This register can be written during the configuration state
only. The value of this register does not effect the external clock correction value.
3.2.3.3.26
Coldstart Maximum Register (CSMR)
FlexRay Protocol Related Parameter – gColdStartAttempts
Address 0xC0
Reset
undefined state
The value in this register determines the maximum number of coldstart attempts that a coldstarting startup
node is allowed to make, when trying to start up the network without receiving a valid response from
another node. After this number of coldstart attempts, the CC falls back to the integration listen state and
does not perform another coldstart attempt, until the controller enters and leaves the configuration state
again. If the register is programmed with the value ‘0’, then the CC is not allowed to start communication.
Writing the coldstart maximum register is possible during the configuration state only. The value of this
register must be within the range [0:32767].
15
14
13
12
11
10
9
8
MRC15
MRC14
MRC13
MRC12
MRC11
MRC10
MRC9
MRC8
rw*
rw*
rw*
rw*
rw*
rw*
rw*
rw*
7
6
5
4
3
2
1
0
MRC7
MRC6
MRC5
MRC4
MRC3
MRC2
MRC1
MRC0
rw*
rw*
rw*
rw*
rw*
rw*
rw*
rw*
Figure 3-38. Maximum Rate Correction Register
15
14
13
12
11
10
9
8
CMS15
CMS14
CMS13
CMS12
CMS11
CMS10
CMS9
CMS8
rw*
rw*
rw*
rw*
rw*
rw*
rw*
rw*
7
6
5
4
3
2
1
0
CSM7
CSM6
CSM5
CSM4
CSM3
CSM2
CSM1
CSM0
rw*
rw*
rw*
rw*
rw*
rw*
rw*
rw*
Figure 3-39. Coldstart Maximum Register