參數(shù)資料
型號(hào)： PDI1394P24
廠商： NXP Semiconductors N.V.
英文描述： 2-port 400 Mbps physical layer interface(2端口 400 Mbps物理層接口)
中文描述： 2端口400 Mbps的物理層接口（2端口400 Mbps的物理層接口）
文件頁(yè)數(shù)： 17/39頁(yè)
文件大?。?/td> 188K
代理商： PDI1394P24
Philips Semiconductors
Objective specification
PDI1394P24
2-port 400 Mbps physical layer interface
2000 Jun 23
17
The Vendor Identification page is used to identify the vendor/manufacturer and compliance level. The page is selected by writing 1 to the
Page_Select field in base register 7. The configuration of the Vendor Identification page is shown in Table 5, and corresponding field
descriptions are given in Table 6.
Table 5. Page 1 (Vendor ID) Register Configuration
ADDRESS
BIT POSITION
3
Compliance
Reserved
Vendor_ID[0]
Vendor_ID[1]
Vendor_ID[2]
Product_ID[0]
Product_ID[1]
Product_ID[2]
0
1
2
4
5
6
7
1000
1001
1010
1011
1100
1101
1110
1111
Table 6. Page 1 (Vendor ID) Register Field Descriptions
FIELD
SIZE
8
TYPE
Rd
DESCRIPTION
Compliance
Compliance level. For the PDI1394P24, this field is 01h, indicating compliance with the P1394a
specification.
Manufacturer’s organizationally unique identifier (OUI). For the PDI1394P24, this field is 00_60_37h
(Philips Semiconductors) (the MSB is at register address 1010b).
Product identifier. For the PDI1394P24, this field is 42_39_x0h (the MSB is at register address 1101b).
Vendor_ID
24
Rd
Product_ID
24
Rd
The Vendor-Dependent page provides access to the special control features of the PDI1394P24, as well as configuration and status information
used in manufacturing test and debug. This page is selected by writing 7 to the Page Select field in base register 7. The configuration of the
Vendor-Dependent page is shown in Table 7 and corresponding field descriptions given in Table 8.
Table 7. Page 7 (Vendor-Dependent) Register Field Descriptions
ADDRESS
BIT POSITION
3
0
1
2
4
5
6
7
1000
1001
1010
1011
1100
1101
1110
1111
Reserved
Link_Speed
Reserved for test
Reserved for test
Reserved for test
Reserved for test
Reserved for test
Reserved for test
Reserved for test
Table 8. Page 7 (Vendor-Dependent) Register Field Descriptions
FIELD
SIZE
2
TYPE
Rd/Wr
DESCRIPTION
Link_Speed
Link speed. This field indicates the top speed capability of the attached LLC. Encoding is as follows:
Code
Speed
00
S100
01
S200
10
S400
11
illegal
This field is replicated in the “sp” field of the self-ID packet to indicate the speed capability of the node
(PHY and LLC in combination). However, this field does not affect the PHY speed capability indicated to
peer PHYs during self-ID; the PDI1394P24 PHY identifies itself as S400 capable to its peers regardless
of the value in this field. This field is set to 10b (S400) by hardware reset and is unaffected by bus-reset.
An 11b can be written into this field, however, a 10b will be sent in the self-ID packet.
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