77
CHAPTER 3 CPU ARCHITECTURE
User
’
s Manual U14701EJ3V0UD
Table 3-4. Special Function Register List (3/4)
Address
Special Function Register (SFR) Name
Symbol
R/W
Manipulatable Bit Unit
After Reset
1 Bit
8 Bits 16 Bits
FF60H
16-bit timer mode control register 0
TMC0
R/W
√
√
—
00H
FF61H
Prescaler mode register 0
PRM0
R/W
—
√
—
00H
FF62H
Capture/compare control register 0
CRC0
R/W
√
√
—
00H
FF63H
16-bit timer output control register 0
TOC0
R/W
√
√
—
00H
FF64H
16-bit timer compare register 4
CR4
R/W
—
—
√
Undefined
FF65H
FF66H
16-bit timer counter 4
TM4
—
—
—
—
Undefined
FF67H
FF68H
16-bit timer mode control register 4
TMC4
R/W
√
√
—
00H
FF70H
8-bit timer mode control register 50
TMC50
R/W
√
√
—
00H
FF71H
Timer clock select register 50
TCL50
R/W
—
√
—
00H
FF73H
8-bit timer mode control register 51
TMC51
R/W
√
√
—
00H
FF74H
Timer clock select register 51
TCL51
R/W
—
√
—
00H
FF76H
8-bit timer mode control register 52
TMC52
R/W
√
√
—
00H
FF77H
Timer clock select register 52
TCL52
R/W
—
√
—
00H
FF79H
8-bit timer compare register 52
CR52
R/W
—
√
—
Undefined
FF7AH
8-bit timer counter 52
TM52
R
—
√
—
00H
FF80H
A/D converter mode register 0
ADM0
R/W
√
√
—
00H
FF81H
Analog input channel specification register 0
ADS0
R/W
—
√
—
00H
FF82H
D/A converter mode register 0
DAM0
R/W
√
√
—
00H
FF83H
D/A conversion value setting register 0
DA0
R/W
—
√
—
00H
FF8AH
Correction control register
CORCN
R/W
√
√
—
00H
FF8FH
Key return switching register
KRSEL
R/W
Note
√
√
—
00H
FF90H
LCD display mode register 3
LCDM3
R/W
√
√
—
00H
FF91H
LCD clock control register 3
LCDC3
R/W
—
√
—
00H
FF92H
Static/dynamic display switching register 3
SDSEL3
R/W
—
√
—
00H
FFA0H
Asynchronous serial interface mode register 0
ASIM0
R/W
√
√
—
00H
FFA1H
Asynchronous serial interface status register 0
ASIS0
R
—
√
—
00H
FFA2H
Baud rate generator control register 0
BRGC0
R/W
—
√
—
00H
FFAFH
Serial operation mode register 3
CSIM3
R/W
√
√
—
00H
FFB0H
Serial operation mode register 1
CSIM1
R/W
√
√
—
00H
FFB1H
Serial clock select register 1
CSIC1
R/W
√
√
—
10H
FFB2H
Serial I/O shift register 1
SIO1
R
—
√
—
Undefined
FFB4H
Transmit buffer register 1
SOTB1
R/W
—
√
—
Undefined
Note
KRSEL can be accessed but its read value is not guaranteed.