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CHAPTER 19 STANDBY FUNCTION
User
’
s Manual U14701EJ3V0UD
19.2.2 STOP mode
(1) STOP mode setting and operating statuses
The STOP mode is set by executing the STOP instruction. It can be set only with the main system clock.
Cautions 1. When the STOP mode is set, the X2 pin is internally connected to V
DD1
via a pull-up resistor
to minimize the leakage current at the crystal oscillator. Thus, do not use the STOP mode
in a system where an external clock is used for the main system clock.
2. Because the interrupt request signal is used to clear the standby mode, if there is an
interrupt source with the interrupt request flag set and the interrupt mask flag reset, the
standby mode is immediately cleared if set. Thus, the STOP mode is reset to the HALT mode
immediately after execution of the STOP instruction. After the wait set using the oscillation
stabilization time select register (OSTS), the operation mode is set.
The operating statuses in the STOP mode are described below.
Table 19-3. STOP Mode Operating Statuses
STOP Mode Setting
With Subsystem Clock
Without Subsystem Clock
Item
Clock generator
Only main system clock oscillation is stopped.
CPU
Operation stops.
Port (output latch)
Status before STOP mode setting is held.
16-bit timer/event counter 0
Operation stops.
16-bit timer/event counter 4
Operable when TI4 is selected as count clock.
8-bit timer/event counters 50, 51, 52
Operable when TI50, TI51, and TI52 are selected as count clock.
Watch timer
Operable when f
XT
is selected as count
clock.
Operation stops.
Watchdog timer
Operation stops.
Clock output
PCL is low
Buzzer output
BUZ is low
A/D converter
Operation stops.
D/A converter
Serial interface UART0
Operation stops (transmit shift register 0 (TXS0), receive shift register 0 (RX0),
and receive buffer register 0 (RXB0) hold the value just before the clock stop).
Serial interface CSI1
Operable only when externally input clock is selected as serial clock.
Serial interface SIO3
LCD controller/driver
Operable when f
XT
is selected as count
clock.
Operation stops.