67
CHAPTER 3 CPU ARCHITECTURE
User
’
s Manual U14701EJ3V0UD
3.1.4 Data memory addressing
Addressing refers to the method of specifying the address of the instruction to be executed next or the address
of the register or memory relevant to the execution of instructions.
Several addressing modes are provided for addressing the memory relevant to the execution of instructions for
the
μ
PD780318, 780328, and 780338 Subseries, based on operability and other considerations. For areas containing
data memory in particular, special addressing methods designed for the functions of special function registers (SFR)
and general-purpose registers are available for use. Data memory and its corresponding addressing are illustrated
in Figures 3-4 to 3-6. For the details of each addressing mode, see
3.4 Operand Address Addressing
.
Figure 3-4. Data Memory Addressing (
μ
PD780316, 780326, 780336)
Note
The area that can be used as LCD display data varies depending on the product. The area not used as
LCD display data can be used as normal RAM.
μ
PD780316: FA00H to FA17H (24 bytes)
μ
PD780326: FA00H to FA1FH (32 bytes)
μ
PD780336: FA00H to FA27H (40 bytes)
Special function registers (SFRs)
256
×
8 bits
Internal high-speed RAM
1,024
×
8 bits
LCD display RAM
40
×
8 bits
Note
Internal expansion RAM
1,536
×
8 bits
General-purpose
registers
32
×
8 bits
Reserved
Reserved
Reserved
Internal ROM
49,152
×
8 bits
SFR addressing
Short direct
addressing
Register addressing
Direct addressing
Register indirect
addressing
Based addressing
Based indexed
addressing
H
H
H
H
H
H
H
F
0
F
0
F
0
F
F
2
1
0
F
E
D
F
F
F
F
E
E
E
F
F
F
F
F
F
F
H
H
H
H
0
F
0
F
2
1
0
F
F
E
B
A
F
F
F
F
H
H
8
7
2
2
A
A
F
F
H
H
0
F
0
F
A
9
F
F
H
H
0
F
0
F
8
7
F
F
H
H
H
H
0
F
0
F
0
F
0
F
2
1
0
F
F
F
C
B
H
0
0
0
0